gcc: Adapteva Epiphany Options
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1 3.18.2 Adapteva Epiphany Options
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1 These '-m' options are defined for Adapteva Epiphany:
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1 '-mhalf-reg-file'
1 Don't allocate any register in the range 'r32'...'r63'. That
1 allows code to run on hardware variants that lack these registers.
1
1 '-mprefer-short-insn-regs'
1 Preferentially allocate registers that allow short instruction
1 generation. This can result in increased instruction count, so
1 this may either reduce or increase overall code size.
1
1 '-mbranch-cost=NUM'
1 Set the cost of branches to roughly NUM "simple" instructions.
1 This cost is only a heuristic and is not guaranteed to produce
1 consistent results across releases.
1
1 '-mcmove'
1 Enable the generation of conditional moves.
1
1 '-mnops=NUM'
1 Emit NUM NOPs before every other generated instruction.
1
1 '-mno-soft-cmpsf'
1 For single-precision floating-point comparisons, emit an 'fsub'
1 instruction and test the flags. This is faster than a software
1 comparison, but can get incorrect results in the presence of NaNs,
1 or when two different small numbers are compared such that their
1 difference is calculated as zero. The default is '-msoft-cmpsf',
1 which uses slower, but IEEE-compliant, software comparisons.
1
1 '-mstack-offset=NUM'
1 Set the offset between the top of the stack and the stack pointer.
1 E.g., a value of 8 means that the eight bytes in the range
1 'sp+0...sp+7' can be used by leaf functions without stack
1 allocation. Values other than '8' or '16' are untested and
1 unlikely to work. Note also that this option changes the ABI;
1 compiling a program with a different stack offset than the
1 libraries have been compiled with generally does not work. This
1 option can be useful if you want to evaluate if a different stack
1 offset would give you better code, but to actually use a different
1 stack offset to build working programs, it is recommended to
1 configure the toolchain with the appropriate
1 '--with-stack-offset=NUM' option.
1
1 '-mno-round-nearest'
1 Make the scheduler assume that the rounding mode has been set to
1 truncating. The default is '-mround-nearest'.
1
1 '-mlong-calls'
1 If not otherwise specified by an attribute, assume all calls might
1 be beyond the offset range of the 'b' / 'bl' instructions, and
1 therefore load the function address into a register before
1 performing a (otherwise direct) call. This is the default.
1
1 '-mshort-calls'
1 If not otherwise specified by an attribute, assume all direct calls
1 are in the range of the 'b' / 'bl' instructions, so use these
1 instructions for direct calls. The default is '-mlong-calls'.
1
1 '-msmall16'
1 Assume addresses can be loaded as 16-bit unsigned values. This
1 does not apply to function addresses for which '-mlong-calls'
1 semantics are in effect.
1
1 '-mfp-mode=MODE'
1 Set the prevailing mode of the floating-point unit. This
1 determines the floating-point mode that is provided and expected at
1 function call and return time. Making this mode match the mode you
1 predominantly need at function start can make your programs smaller
1 and faster by avoiding unnecessary mode switches.
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1 MODE can be set to one the following values:
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1 'caller'
1 Any mode at function entry is valid, and retained or restored
1 when the function returns, and when it calls other functions.
1 This mode is useful for compiling libraries or other
1 compilation units you might want to incorporate into different
1 programs with different prevailing FPU modes, and the
1 convenience of being able to use a single object file
1 outweighs the size and speed overhead for any extra mode
1 switching that might be needed, compared with what would be
1 needed with a more specific choice of prevailing FPU mode.
1
1 'truncate'
1 This is the mode used for floating-point calculations with
1 truncating (i.e. round towards zero) rounding mode. That
1 includes conversion from floating point to integer.
1
1 'round-nearest'
1 This is the mode used for floating-point calculations with
1 round-to-nearest-or-even rounding mode.
1
1 'int'
1 This is the mode used to perform integer calculations in the
1 FPU, e.g. integer multiply, or integer
1 multiply-and-accumulate.
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1 The default is '-mfp-mode=caller'
1
1 '-mnosplit-lohi'
1 '-mno-postinc'
1 '-mno-postmodify'
1 Code generation tweaks that disable, respectively, splitting of
1 32-bit loads, generation of post-increment addresses, and
1 generation of post-modify addresses. The defaults are
1 'msplit-lohi', '-mpost-inc', and '-mpost-modify'.
1
1 '-mnovect-double'
1 Change the preferred SIMD mode to SImode. The default is
1 '-mvect-double', which uses DImode as preferred SIMD mode.
1
1 '-max-vect-align=NUM'
1 The maximum alignment for SIMD vector mode types. NUM may be 4 or
1 8. The default is 8. Note that this is an ABI change, even though
1 many library function interfaces are unaffected if they don't use
1 SIMD vector modes in places that affect size and/or alignment of
1 relevant types.
1
1 '-msplit-vecmove-early'
1 Split vector moves into single word moves before reload. In theory
1 this can give better register allocation, but so far the reverse
1 seems to be generally the case.
1
1 '-m1reg-REG'
1 Specify a register to hold the constant -1, which makes loading
1 small negative constants and certain bitmasks faster. Allowable
1 values for REG are 'r43' and 'r63', which specify use of that
1 register as a fixed register, and 'none', which means that no
1 register is used for this purpose. The default is '-m1reg-none'.
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