as: M68K-Opts
1
1 9.23.1 M680x0 Options
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1
1 The Motorola 680x0 version of 'as' has a few machine dependent options:
1
1 '-march=ARCHITECTURE'
1 This option specifies a target architecture. The following
1 architectures are recognized: '68000', '68010', '68020', '68030',
1 '68040', '68060', 'cpu32', 'isaa', 'isaaplus', 'isab', 'isac' and
1 'cfv4e'.
1
1 '-mcpu=CPU'
1 This option specifies a target cpu. When used in conjunction with
1 the '-march' option, the cpu must be within the specified
1 architecture. Also, the generic features of the architecture are
1 used for instruction generation, rather than those of the specific
1 chip.
1
1 '-m[no-]68851'
1 '-m[no-]68881'
1 '-m[no-]div'
1 '-m[no-]usp'
1 '-m[no-]float'
1 '-m[no-]mac'
1 '-m[no-]emac'
1
1 Enable or disable various architecture specific features. If a
1 chip or architecture by default supports an option (for instance
1 '-march=isaaplus' includes the '-mdiv' option), explicitly
1 disabling the option will override the default.
1
1 '-l'
1 You can use the '-l' option to shorten the size of references to
1 undefined symbols. If you do not use the '-l' option, references
1 to undefined symbols are wide enough for a full 'long' (32 bits).
1 (Since 'as' cannot know where these symbols end up, 'as' can only
1 allocate space for the linker to fill in later. Since 'as' does
1 not know how far away these symbols are, it allocates as much space
1 as it can.) If you use this option, the references are only one
1 word wide (16 bits). This may be useful if you want the object
1 file to be as small as possible, and you know that the relevant
1 symbols are always less than 17 bits away.
1
1 '--register-prefix-optional'
1 For some configurations, especially those where the compiler
1 normally does not prepend an underscore to the names of user
1 variables, the assembler requires a '%' before any use of a
1 register name. This is intended to let the assembler distinguish
1 between C variables and functions named 'a0' through 'a7', and so
1 on. The '%' is always accepted, but is not required for certain
1 configurations, notably 'sun3'. The '--register-prefix-optional'
1 option may be used to permit omitting the '%' even for
1 configurations for which it is normally required. If this is done,
1 it will generally be impossible to refer to C variables and
1 functions with the same names as register names.
1
1 '--bitwise-or'
1 Normally the character '|' is treated as a comment character, which
1 means that it can not be used in expressions. The '--bitwise-or'
1 option turns '|' into a normal character. In this mode, you must
1 either use C style comments, or start comments with a '#' character
1 at the beginning of a line.
1
1 '--base-size-default-16 --base-size-default-32'
1 If you use an addressing mode with a base register without
1 specifying the size, 'as' will normally use the full 32 bit value.
1 For example, the addressing mode '%a0@(%d0)' is equivalent to
1 '%a0@(%d0:l)'. You may use the '--base-size-default-16' option to
1 tell 'as' to default to using the 16 bit value. In this case,
1 '%a0@(%d0)' is equivalent to '%a0@(%d0:w)'. You may use the
1 '--base-size-default-32' option to restore the default behaviour.
1
1 '--disp-size-default-16 --disp-size-default-32'
1 If you use an addressing mode with a displacement, and the value of
1 the displacement is not known, 'as' will normally assume that the
1 value is 32 bits. For example, if the symbol 'disp' has not been
1 defined, 'as' will assemble the addressing mode '%a0@(disp,%d0)' as
1 though 'disp' is a 32 bit value. You may use the
1 '--disp-size-default-16' option to tell 'as' to instead assume that
1 the displacement is 16 bits. In this case, 'as' will assemble
1 '%a0@(disp,%d0)' as though 'disp' is a 16 bit value. You may use
1 the '--disp-size-default-32' option to restore the default
1 behaviour.
1
1 '--pcrel'
1 Always keep branches PC-relative. In the M680x0 architecture all
1 branches are defined as PC-relative. However, on some processors
1 they are limited to word displacements maximum. When 'as' needs a
1 long branch that is not available, it normally emits an absolute
1 jump instead. This option disables this substitution. When this
1 option is given and no long branches are available, only word
1 branches will be emitted. An error message will be generated if a
1 word branch cannot reach its target. This option has no effect on
11 68020 and other processors that have long branches. ⇒Branch
Improvement M68K-Branch.
1
1 '-m68000'
1 'as' can assemble code for several different members of the
1 Motorola 680x0 family. The default depends upon how 'as' was
1 configured when it was built; normally, the default is to assemble
1 code for the 68020 microprocessor. The following options may be
1 used to change the default. These options control which
1 instructions and addressing modes are permitted. The members of
1 the 680x0 family are very similar. For detailed information about
1 the differences, see the Motorola manuals.
1
1 '-m68000'
1 '-m68ec000'
1 '-m68hc000'
1 '-m68hc001'
1 '-m68008'
1 '-m68302'
1 '-m68306'
1 '-m68307'
1 '-m68322'
1 '-m68356'
1 Assemble for the 68000. '-m68008', '-m68302', and so on are
1 synonyms for '-m68000', since the chips are the same from the
1 point of view of the assembler.
1
1 '-m68010'
1 Assemble for the 68010.
1
1 '-m68020'
1 '-m68ec020'
1 Assemble for the 68020. This is normally the default.
1
1 '-m68030'
1 '-m68ec030'
1 Assemble for the 68030.
1
1 '-m68040'
1 '-m68ec040'
1 Assemble for the 68040.
1
1 '-m68060'
1 '-m68ec060'
1 Assemble for the 68060.
1
1 '-mcpu32'
1 '-m68330'
1 '-m68331'
1 '-m68332'
1 '-m68333'
1 '-m68334'
1 '-m68336'
1 '-m68340'
1 '-m68341'
1 '-m68349'
1 '-m68360'
1 Assemble for the CPU32 family of chips.
1
1 '-m5200'
1 '-m5202'
1 '-m5204'
1 '-m5206'
1 '-m5206e'
1 '-m521x'
1 '-m5249'
1 '-m528x'
1 '-m5307'
1 '-m5407'
1 '-m547x'
1 '-m548x'
1 '-mcfv4'
1 '-mcfv4e'
1 Assemble for the ColdFire family of chips.
1
1 '-m68881'
1 '-m68882'
1 Assemble 68881 floating point instructions. This is the
1 default for the 68020, 68030, and the CPU32. The 68040 and
1 68060 always support floating point instructions.
1
1 '-mno-68881'
1 Do not assemble 68881 floating point instructions. This is
1 the default for 68000 and the 68010. The 68040 and 68060
1 always support floating point instructions, even if this
1 option is used.
1
1 '-m68851'
1 Assemble 68851 MMU instructions. This is the default for the
1 68020, 68030, and 68060. The 68040 accepts a somewhat
1 different set of MMU instructions; '-m68851' and '-m68040'
1 should not be used together.
1
1 '-mno-68851'
1 Do not assemble 68851 MMU instructions. This is the default
1 for the 68000, 68010, and the CPU32. The 68040 accepts a
1 somewhat different set of MMU instructions.
1