as: M68K-Branch

1 
1 9.23.6.1 Branch Improvement
1 ...........................
1 
1 Certain pseudo opcodes are permitted for branch instructions.  They
1 expand to the shortest branch instruction that reach the target.
1 Generally these mnemonics are made by substituting 'j' for 'b' at the
1 start of a Motorola mnemonic.
1 
1    The following table summarizes the pseudo-operations.  A '*' flags
1 cases that are more fully described after the table:
1 
1                Displacement
1                +------------------------------------------------------------
1                |                68020           68000/10, not PC-relative OK
1      Pseudo-Op |BYTE    WORD    LONG            ABSOLUTE LONG JUMP    **
1                +------------------------------------------------------------
1           jbsr |bsrs    bsrw    bsrl            jsr
1            jra |bras    braw    bral            jmp
1      *     jXX |bXXs    bXXw    bXXl            bNXs;jmp
1      *    dbXX | N/A    dbXXw   dbXX;bras;bral  dbXX;bras;jmp
1           fjXX | N/A    fbXXw   fbXXl            N/A
1 
1      XX: condition
1      NX: negative of condition XX
1 
1                     '*'--see full description below
1          '**'--this expansion mode is disallowed by '--pcrel'
1 
1 'jbsr'
1 'jra'
1      These are the simplest jump pseudo-operations; they always map to
1      one particular machine instruction, depending on the displacement
1      to the branch target.  This instruction will be a byte or word
1      branch is that is sufficient.  Otherwise, a long branch will be
1      emitted if available.  If no long branches are available and the
1      '--pcrel' option is not given, an absolute long jump will be
1      emitted instead.  If no long branches are available, the '--pcrel'
1      option is given, and a word branch cannot reach the target, an
1      error message is generated.
1 
1      In addition to standard branch operands, 'as' allows these
1      pseudo-operations to have all operands that are allowed for jsr and
1      jmp, substituting these instructions if the operand given is not
1      valid for a branch instruction.
1 
1 'jXX'
1      Here, 'jXX' stands for an entire family of pseudo-operations, where
1      XX is a conditional branch or condition-code test.  The full list
1      of pseudo-ops in this family is:
1            jhi   jls   jcc   jcs   jne   jeq   jvc
1            jvs   jpl   jmi   jge   jlt   jgt   jle
1 
1      Usually, each of these pseudo-operations expands to a single branch
1      instruction.  However, if a word branch is not sufficient, no long
1      branches are available, and the '--pcrel' option is not given, 'as'
1      issues a longer code fragment in terms of NX, the opposite
1      condition to XX.  For example, under these conditions:
1               jXX foo
1      gives
1                bNXs oof
1                jmp foo
1            oof:
1 
1 'dbXX'
1      The full family of pseudo-operations covered here is
1            dbhi   dbls   dbcc   dbcs   dbne   dbeq   dbvc
1            dbvs   dbpl   dbmi   dbge   dblt   dbgt   dble
1            dbf    dbra   dbt
1 
1      Motorola 'dbXX' instructions allow word displacements only.  When a
1      word displacement is sufficient, each of these pseudo-operations
1      expands to the corresponding Motorola instruction.  When a word
1      displacement is not sufficient and long branches are available,
1      when the source reads 'dbXX foo', 'as' emits
1                dbXX oo1
1                bras oo2
1            oo1:bral foo
1            oo2:
1 
1      If, however, long branches are not available and the '--pcrel'
1      option is not given, 'as' emits
1                dbXX oo1
1                bras oo2
1            oo1:jmp foo
1            oo2:
1 
1 'fjXX'
1      This family includes
1            fjne   fjeq   fjge   fjlt   fjgt   fjle   fjf
1            fjt    fjgl   fjgle  fjnge  fjngl  fjngle fjngt
1            fjnle  fjnlt  fjoge  fjogl  fjogt  fjole  fjolt
1            fjor   fjseq  fjsf   fjsne  fjst   fjueq  fjuge
1            fjugt  fjule  fjult  fjun
1 
1      Each of these pseudo-operations always expands to a single Motorola
1      coprocessor branch instruction, word or long.  All Motorola
1      coprocessor branch instructions allow both word and long
1      displacements.
1