gccint: poly_int

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1 10 Sizes and offsets as runtime invariants
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1 GCC allows the size of a hardware register to be a runtime invariant
1 rather than a compile-time constant.  This in turn means that various
1 sizes and offsets must also be runtime invariants rather than
1 compile-time constants, such as:
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1    * the size of a general 'machine_mode' (⇒Machine Modes);
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1    * the size of a spill slot;
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1    * the offset of something within a stack frame;
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1    * the number of elements in a vector;
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1    * the size and offset of a 'mem' rtx (⇒Regs and Memory); and
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1    * the byte offset in a 'subreg' rtx (⇒Regs and Memory).
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1  The motivating example is the Arm SVE ISA, whose vector registers can
1 be any multiple of 128 bits between 128 and 2048 inclusive.  The
1 compiler normally produces code that works for all SVE register sizes,
1 with the actual size only being known at runtime.
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1  GCC's main representation of such runtime invariants is the 'poly_int'
1 class.  This chapter describes what 'poly_int' does, lists the available
1 operations, and gives some general usage guidelines.
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Menu

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· Overview of poly_int
· Consequences of using poly_int
· Comparisons involving poly_int
· Arithmetic on poly_ints
· Alignment of poly_ints
· Computing bounds on poly_ints
· Converting poly_ints
· Miscellaneous poly_int routines
· Guidelines for using poly_int
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