gccint: Incdec

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1 14.16 Embedded Side-Effects on Addresses
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1 Six special side-effect expression codes appear as memory addresses.
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1 '(pre_dec:M X)'
1      Represents the side effect of decrementing X by a standard amount
1      and represents also the value that X has after being decremented.
1      X must be a 'reg' or 'mem', but most machines allow only a 'reg'.
1      M must be the machine mode for pointers on the machine in use.  The
1      amount X is decremented by is the length in bytes of the machine
1      mode of the containing memory reference of which this expression
1      serves as the address.  Here is an example of its use:
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1           (mem:DF (pre_dec:SI (reg:SI 39)))
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1      This says to decrement pseudo register 39 by the length of a
1      'DFmode' value and use the result to address a 'DFmode' value.
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1 '(pre_inc:M X)'
1      Similar, but specifies incrementing X instead of decrementing it.
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1 '(post_dec:M X)'
1      Represents the same side effect as 'pre_dec' but a different value.
1      The value represented here is the value X has before being
1      decremented.
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1 '(post_inc:M X)'
1      Similar, but specifies incrementing X instead of decrementing it.
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1 '(post_modify:M X Y)'
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1      Represents the side effect of setting X to Y and represents X
1      before X is modified.  X must be a 'reg' or 'mem', but most
1      machines allow only a 'reg'.  M must be the machine mode for
1      pointers on the machine in use.
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1      The expression Y must be one of three forms: '(plus:M X Z)',
1      '(minus:M X Z)', or '(plus:M X I)', where Z is an index register
1      and I is a constant.
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1      Here is an example of its use:
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1           (mem:SF (post_modify:SI (reg:SI 42) (plus (reg:SI 42)
1                                                     (reg:SI 48))))
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1      This says to modify pseudo register 42 by adding the contents of
1      pseudo register 48 to it, after the use of what ever 42 points to.
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1 '(pre_modify:M X EXPR)'
1      Similar except side effects happen before the use.
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1  These embedded side effect expressions must be used with care.
1 Instruction patterns may not use them.  Until the 'flow' pass of the
1 compiler, they may occur only to represent pushes onto the stack.  The
1 'flow' pass finds cases where registers are incremented or decremented
1 in one instruction and used as an address shortly before or after; these
1 cases are then transformed to use pre- or post-increment or -decrement.
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1  If a register used as the operand of these expressions is used in
1 another address in an insn, the original value of the register is used.
1 Uses of the register outside of an address are not permitted within the
1 same insn as a use in an embedded side effect expression because such
1 insns behave differently on different machines and hence must be treated
1 as ambiguous and disallowed.
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1  An instruction that can be represented with an embedded side effect
1 could also be represented using 'parallel' containing an additional
1 'set' to describe how the address register is altered.  This is not done
1 because machines that allow these operations at all typically allow them
1 wherever a memory address is called for.  Describing them as additional
1 parallel stores would require doubling the number of entries in the
1 machine description.
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