gcc: PowerPC Built-in Functions
1
1 6.59.21 PowerPC Built-in Functions
1 ----------------------------------
1
1 The following built-in functions are always available and can be used to
1 check the PowerPC target platform type:
1
1 -- Built-in Function: void __builtin_cpu_init (void)
1 This function is a 'nop' on the PowerPC platform and is included
1 solely to maintain API compatibility with the x86 builtins.
1
1 -- Built-in Function: int __builtin_cpu_is (const char *CPUNAME)
1 This function returns a value of '1' if the run-time CPU is of type
1 CPUNAME and returns '0' otherwise
1
1 The '__builtin_cpu_is' function requires GLIBC 2.23 or newer which
1 exports the hardware capability bits. GCC defines the macro
1 '__BUILTIN_CPU_SUPPORTS__' if the '__builtin_cpu_supports' built-in
1 function is fully supported.
1
1 If GCC was configured to use a GLIBC before 2.23, the built-in
1 function '__builtin_cpu_is' always returns a 0 and the compiler
1 issues a warning.
1
1 The following CPU names can be detected:
1
1 'power9'
1 IBM POWER9 Server CPU.
1 'power8'
1 IBM POWER8 Server CPU.
1 'power7'
1 IBM POWER7 Server CPU.
1 'power6x'
1 IBM POWER6 Server CPU (RAW mode).
1 'power6'
1 IBM POWER6 Server CPU (Architected mode).
1 'power5+'
1 IBM POWER5+ Server CPU.
1 'power5'
1 IBM POWER5 Server CPU.
1 'ppc970'
1 IBM 970 Server CPU (ie, Apple G5).
1 'power4'
1 IBM POWER4 Server CPU.
1 'ppca2'
1 IBM A2 64-bit Embedded CPU
1 'ppc476'
1 IBM PowerPC 476FP 32-bit Embedded CPU.
1 'ppc464'
1 IBM PowerPC 464 32-bit Embedded CPU.
1 'ppc440'
1 PowerPC 440 32-bit Embedded CPU.
1 'ppc405'
1 PowerPC 405 32-bit Embedded CPU.
1 'ppc-cell-be'
1 IBM PowerPC Cell Broadband Engine Architecture CPU.
1
1 Here is an example:
1 #ifdef __BUILTIN_CPU_SUPPORTS__
1 if (__builtin_cpu_is ("power8"))
1 {
1 do_power8 (); // POWER8 specific implementation.
1 }
1 else
1 #endif
1 {
1 do_generic (); // Generic implementation.
1 }
1
1 -- Built-in Function: int __builtin_cpu_supports (const char *FEATURE)
1 This function returns a value of '1' if the run-time CPU supports
1 the HWCAP feature FEATURE and returns '0' otherwise.
1
1 The '__builtin_cpu_supports' function requires GLIBC 2.23 or newer
1 which exports the hardware capability bits. GCC defines the macro
1 '__BUILTIN_CPU_SUPPORTS__' if the '__builtin_cpu_supports' built-in
1 function is fully supported.
1
1 If GCC was configured to use a GLIBC before 2.23, the built-in
1 function '__builtin_cpu_suports' always returns a 0 and the
1 compiler issues a warning.
1
1 The following features can be detected:
1
1 '4xxmac'
1 4xx CPU has a Multiply Accumulator.
1 'altivec'
1 CPU has a SIMD/Vector Unit.
1 'arch_2_05'
1 CPU supports ISA 2.05 (eg, POWER6)
1 'arch_2_06'
1 CPU supports ISA 2.06 (eg, POWER7)
1 'arch_2_07'
1 CPU supports ISA 2.07 (eg, POWER8)
1 'arch_3_00'
1 CPU supports ISA 3.0 (eg, POWER9)
1 'archpmu'
1 CPU supports the set of compatible performance monitoring
1 events.
1 'booke'
1 CPU supports the Embedded ISA category.
1 'cellbe'
1 CPU has a CELL broadband engine.
1 'dfp'
1 CPU has a decimal floating point unit.
1 'dscr'
1 CPU supports the data stream control register.
1 'ebb'
1 CPU supports event base branching.
1 'efpdouble'
1 CPU has a SPE double precision floating point unit.
1 'efpsingle'
1 CPU has a SPE single precision floating point unit.
1 'fpu'
1 CPU has a floating point unit.
1 'htm'
1 CPU has hardware transaction memory instructions.
1 'htm-nosc'
1 Kernel aborts hardware transactions when a syscall is made.
1 'ic_snoop'
1 CPU supports icache snooping capabilities.
1 'ieee128'
1 CPU supports 128-bit IEEE binary floating point instructions.
1 'isel'
1 CPU supports the integer select instruction.
1 'mmu'
1 CPU has a memory management unit.
1 'notb'
1 CPU does not have a timebase (eg, 601 and 403gx).
1 'pa6t'
1 CPU supports the PA Semi 6T CORE ISA.
1 'power4'
1 CPU supports ISA 2.00 (eg, POWER4)
1 'power5'
1 CPU supports ISA 2.02 (eg, POWER5)
1 'power5+'
1 CPU supports ISA 2.03 (eg, POWER5+)
1 'power6x'
1 CPU supports ISA 2.05 (eg, POWER6) extended opcodes mffgpr and
1 mftgpr.
1 'ppc32'
1 CPU supports 32-bit mode execution.
1 'ppc601'
1 CPU supports the old POWER ISA (eg, 601)
1 'ppc64'
1 CPU supports 64-bit mode execution.
1 'ppcle'
1 CPU supports a little-endian mode that uses address swizzling.
1 'smt'
1 CPU support simultaneous multi-threading.
1 'spe'
1 CPU has a signal processing extension unit.
1 'tar'
1 CPU supports the target address register.
1 'true_le'
1 CPU supports true little-endian mode.
1 'ucache'
1 CPU has unified I/D cache.
1 'vcrypto'
1 CPU supports the vector cryptography instructions.
1 'vsx'
1 CPU supports the vector-scalar extension.
1
1 Here is an example:
1 #ifdef __BUILTIN_CPU_SUPPORTS__
1 if (__builtin_cpu_supports ("fpu"))
1 {
1 asm("fadd %0,%1,%2" : "=d"(dst) : "d"(src1), "d"(src2));
1 }
1 else
1 #endif
1 {
1 dst = __fadd (src1, src2); // Software FP addition function.
1 }
1
1 These built-in functions are available for the PowerPC family of
1 processors:
1 float __builtin_recipdivf (float, float);
1 float __builtin_rsqrtf (float);
1 double __builtin_recipdiv (double, double);
1 double __builtin_rsqrt (double);
1 uint64_t __builtin_ppc_get_timebase ();
1 unsigned long __builtin_ppc_mftb ();
1 double __builtin_unpack_longdouble (long double, int);
1 long double __builtin_pack_longdouble (double, double);
1 __ibm128 __builtin_unpack_ibm128 (__ibm128, int);
1 __ibm128 __builtin_pack_ibm128 (double, double);
1
1 The 'vec_rsqrt', '__builtin_rsqrt', and '__builtin_rsqrtf' functions
1 generate multiple instructions to implement the reciprocal sqrt
1 functionality using reciprocal sqrt estimate instructions.
1
1 The '__builtin_recipdiv', and '__builtin_recipdivf' functions generate
1 multiple instructions to implement division using the reciprocal
1 estimate instructions.
1
1 The '__builtin_ppc_get_timebase' and '__builtin_ppc_mftb' functions
1 generate instructions to read the Time Base Register. The
1 '__builtin_ppc_get_timebase' function may generate multiple instructions
1 and always returns the 64 bits of the Time Base Register. The
1 '__builtin_ppc_mftb' function always generates one instruction and
1 returns the Time Base Register value as an unsigned long, throwing away
1 the most significant word on 32-bit environments.
1
1 The '__builtin_unpack_longdouble' function takes a 'long double'
1 argument and a compile time constant of 0 or 1. If the constant is 0,
1 the first 'double' within the 'long double' is returned, otherwise the
1 second 'double' is returned. The '__builtin_unpack_longdouble' function
1 is only availble if 'long double' uses the IBM extended double
1 representation.
1
1 The '__builtin_pack_longdouble' function takes two 'double' arguments
1 and returns a 'long double' value that combines the two arguments. The
1 '__builtin_pack_longdouble' function is only availble if 'long double'
1 uses the IBM extended double representation.
1
1 The '__builtin_unpack_ibm128' function takes a '__ibm128' argument and
1 a compile time constant of 0 or 1. If the constant is 0, the first
1 'double' within the '__ibm128' is returned, otherwise the second
1 'double' is returned.
1
1 The '__builtin_pack_ibm128' function takes two 'double' arguments and
1 returns a '__ibm128' value that combines the two arguments.
1
1 Additional built-in functions are available for the 64-bit PowerPC
1 family of processors, for efficient use of 128-bit floating point
1 ('__float128') values.
1
1 Previous versions of GCC supported some 'q' builtins for IEEE 128-bit
1 floating point. These functions are now mapped into the equivalent
1 'f128' builtin functions.
1
1 __builtin_fabsq is mapped into __builtin_fabsf128
1 __builtin_copysignq is mapped into __builtin_copysignf128
1 __builtin_infq is mapped into __builtin_inff128
1 __builtin_huge_valq is mapped into __builtin_huge_valf128
1 __builtin_nanq is mapped into __builtin_nanf128
1 __builtin_nansq is mapped into __builtin_nansf128
1
1 The following built-in functions are available on Linux 64-bit systems
1 that use the ISA 3.0 instruction set.
1
1 '__float128 __builtin_sqrtf128 (__float128)'
1 Perform a 128-bit IEEE floating point square root operation.
1
1 '__float128 __builtin_fmaf128 (__float128, __float128, __float128)'
1 Perform a 128-bit IEEE floating point fused multiply and add
1 operation.
1
1 '__float128 __builtin_addf128_round_to_odd (__float128, __float128)'
1 Perform a 128-bit IEEE floating point add using round to odd as the
1 rounding mode.
1
1 '__float128 __builtin_subf128_round_to_odd (__float128, __float128)'
1 Perform a 128-bit IEEE floating point subtract using round to odd
1 as the rounding mode.
1
1 '__float128 __builtin_mulf128_round_to_odd (__float128, __float128)'
1 Perform a 128-bit IEEE floating point multiply using round to odd
1 as the rounding mode.
1
1 '__float128 __builtin_divf128_round_to_odd (__float128, __float128)'
1 Perform a 128-bit IEEE floating point divide using round to odd as
1 the rounding mode.
1
1 '__float128 __builtin_sqrtf128_round_to_odd (__float128)'
1 Perform a 128-bit IEEE floating point square root using round to
1 odd as the rounding mode.
1
1 '__float128 __builtin_fmaf128 (__float128, __float128, __float128)'
1 Perform a 128-bit IEEE floating point fused multiply and add
1 operation using round to odd as the rounding mode.
1
1 'double __builtin_truncf128_round_to_odd (__float128)'
1 Convert a 128-bit IEEE floating point value to 'double' using round
1 to odd as the rounding mode.
1
1 The following built-in functions are available for the PowerPC family
1 of processors, starting with ISA 2.05 or later ('-mcpu=power6' or
1 '-mcmpb'):
1 unsigned long long __builtin_cmpb (unsigned long long int, unsigned long long int);
1 unsigned int __builtin_cmpb (unsigned int, unsigned int);
1
1 The '__builtin_cmpb' function performs a byte-wise compare on the
1 contents of its two arguments, returning the result of the byte-wise
1 comparison as the returned value. For each byte comparison, the
1 corresponding byte of the return value holds 0xff if the input bytes are
1 equal and 0 if the input bytes are not equal. If either of the
1 arguments to this built-in function is wider than 32 bits, the function
1 call expands into the form that expects 'unsigned long long int'
1 arguments which is only available on 64-bit targets.
1
1 The following built-in functions are available for the PowerPC family
1 of processors, starting with ISA 2.06 or later ('-mcpu=power7' or
1 '-mpopcntd'):
1 long __builtin_bpermd (long, long);
1 int __builtin_divwe (int, int);
1 unsigned int __builtin_divweu (unsigned int, unsigned int);
1 long __builtin_divde (long, long);
1 unsigned long __builtin_divdeu (unsigned long, unsigned long);
1 unsigned int cdtbcd (unsigned int);
1 unsigned int cbcdtd (unsigned int);
1 unsigned int addg6s (unsigned int, unsigned int);
1 void __builtin_rs6000_speculation_barrier (void);
1
1 The '__builtin_divde' and '__builtin_divdeu' functions require a 64-bit
1 environment supporting ISA 2.06 or later.
1
1 The following built-in functions are available for the PowerPC family
1 of processors, starting with ISA 3.0 or later ('-mcpu=power9'):
1 long long __builtin_darn (void);
1 long long __builtin_darn_raw (void);
1 int __builtin_darn_32 (void);
1
1 unsigned int scalar_extract_exp (double source);
1 unsigned long long int scalar_extract_exp (__ieee128 source);
1
1 unsigned long long int scalar_extract_sig (double source);
1 unsigned __int128 scalar_extract_sig (__ieee128 source);
1
1 double
1 scalar_insert_exp (unsigned long long int significand, unsigned long long int exponent);
1 double
1 scalar_insert_exp (double significand, unsigned long long int exponent);
1
1 ieee_128
1 scalar_insert_exp (unsigned __int128 significand, unsigned long long int exponent);
1 ieee_128
1 scalar_insert_exp (ieee_128 significand, unsigned long long int exponent);
1
1 int scalar_cmp_exp_gt (double arg1, double arg2);
1 int scalar_cmp_exp_lt (double arg1, double arg2);
1 int scalar_cmp_exp_eq (double arg1, double arg2);
1 int scalar_cmp_exp_unordered (double arg1, double arg2);
1
1 bool scalar_test_data_class (float source, const int condition);
1 bool scalar_test_data_class (double source, const int condition);
1 bool scalar_test_data_class (__ieee128 source, const int condition);
1
1 bool scalar_test_neg (float source);
1 bool scalar_test_neg (double source);
1 bool scalar_test_neg (__ieee128 source);
1
1 vector _uint128_t vec_msum (vector unsigned long long,
1 vector unsigned long long,
1 vector _uint128_t);
1 vector _int128_t vec_msum (vector signed long long,
1 vector signed long long,
1 vector _int128_t);
1
1 int __builtin_byte_in_set (unsigned char u, unsigned long long set);
1 int __builtin_byte_in_range (unsigned char u, unsigned int range);
1 int __builtin_byte_in_either_range (unsigned char u, unsigned int ranges);
1
1 int __builtin_dfp_dtstsfi_lt (unsigned int comparison, _Decimal64 value);
1 int __builtin_dfp_dtstsfi_lt (unsigned int comparison, _Decimal128 value);
1 int __builtin_dfp_dtstsfi_lt_dd (unsigned int comparison, _Decimal64 value);
1 int __builtin_dfp_dtstsfi_lt_td (unsigned int comparison, _Decimal128 value);
1
1 int __builtin_dfp_dtstsfi_gt (unsigned int comparison, _Decimal64 value);
1 int __builtin_dfp_dtstsfi_gt (unsigned int comparison, _Decimal128 value);
1 int __builtin_dfp_dtstsfi_gt_dd (unsigned int comparison, _Decimal64 value);
1 int __builtin_dfp_dtstsfi_gt_td (unsigned int comparison, _Decimal128 value);
1
1 int __builtin_dfp_dtstsfi_eq (unsigned int comparison, _Decimal64 value);
1 int __builtin_dfp_dtstsfi_eq (unsigned int comparison, _Decimal128 value);
1 int __builtin_dfp_dtstsfi_eq_dd (unsigned int comparison, _Decimal64 value);
1 int __builtin_dfp_dtstsfi_eq_td (unsigned int comparison, _Decimal128 value);
1
1 int __builtin_dfp_dtstsfi_ov (unsigned int comparison, _Decimal64 value);
1 int __builtin_dfp_dtstsfi_ov (unsigned int comparison, _Decimal128 value);
1 int __builtin_dfp_dtstsfi_ov_dd (unsigned int comparison, _Decimal64 value);
1 int __builtin_dfp_dtstsfi_ov_td (unsigned int comparison, _Decimal128 value);
1
1 The '__builtin_darn' and '__builtin_darn_raw' functions require a
1 64-bit environment supporting ISA 3.0 or later. The '__builtin_darn'
1 function provides a 64-bit conditioned random number. The
1 '__builtin_darn_raw' function provides a 64-bit raw random number. The
1 '__builtin_darn_32' function provides a 32-bit random number.
1
1 The 'scalar_extract_exp' and 'scalar_extract_sig' functions require a
1 64-bit environment supporting ISA 3.0 or later. The
1 'scalar_extract_exp' and 'scalar_extract_sig' built-in functions return
1 the significand and the biased exponent value respectively of their
1 'source' arguments. When supplied with a 64-bit 'source' argument, the
1 result returned by 'scalar_extract_sig' has the '0x0010000000000000' bit
1 set if the function's 'source' argument is in normalized form.
1 Otherwise, this bit is set to 0. When supplied with a 128-bit 'source'
1 argument, the '0x00010000000000000000000000000000' bit of the result is
1 treated similarly. Note that the sign of the significand is not
1 represented in the result returned from the 'scalar_extract_sig'
1 function. Use the 'scalar_test_neg' function to test the sign of its
1 'double' argument. The 'vec_msum' functions perform a vector
1 multiply-sum, returning the result of arg1*arg2+arg3. ISA 3.0 adds
1 support for vec_msum returning a vector int128 result.
1
1 The 'scalar_insert_exp' functions require a 64-bit environment
1 supporting ISA 3.0 or later. When supplied with a 64-bit first
1 argument, the 'scalar_insert_exp' built-in function returns a
1 double-precision floating point value that is constructed by assembling
1 the values of its 'significand' and 'exponent' arguments. The sign of
1 the result is copied from the most significant bit of the 'significand'
1 argument. The significand and exponent components of the result are
1 composed of the least significant 11 bits of the 'exponent' argument and
1 the least significant 52 bits of the 'significand' argument
1 respectively.
1
1 When supplied with a 128-bit first argument, the 'scalar_insert_exp'
1 built-in function returns a quad-precision ieee floating point value.
1 The sign bit of the result is copied from the most significant bit of
1 the 'significand' argument. The significand and exponent components of
1 the result are composed of the least significant 15 bits of the
1 'exponent' argument and the least significant 112 bits of the
1 'significand' argument respectively.
1
1 The 'scalar_cmp_exp_gt', 'scalar_cmp_exp_lt', 'scalar_cmp_exp_eq', and
1 'scalar_cmp_exp_unordered' built-in functions return a non-zero value if
1 'arg1' is greater than, less than, equal to, or not comparable to 'arg2'
1 respectively. The arguments are not comparable if one or the other
1 equals NaN (not a number).
1
1 The 'scalar_test_data_class' built-in function returns 1 if any of the
1 condition tests enabled by the value of the 'condition' variable are
1 true, and 0 otherwise. The 'condition' argument must be a compile-time
1 constant integer with value not exceeding 127. The 'condition' argument
1 is encoded as a bitmask with each bit enabling the testing of a
1 different condition, as characterized by the following:
1 0x40 Test for NaN
1 0x20 Test for +Infinity
1 0x10 Test for -Infinity
1 0x08 Test for +Zero
1 0x04 Test for -Zero
1 0x02 Test for +Denormal
1 0x01 Test for -Denormal
1
1 The 'scalar_test_neg' built-in function returns 1 if its 'source'
1 argument holds a negative value, 0 otherwise.
1
1 The '__builtin_byte_in_set' function requires a 64-bit environment
1 supporting ISA 3.0 or later. This function returns a non-zero value if
1 and only if its 'u' argument exactly equals one of the eight bytes
1 contained within its 64-bit 'set' argument.
1
1 The '__builtin_byte_in_range' and '__builtin_byte_in_either_range'
1 require an environment supporting ISA 3.0 or later. For these two
1 functions, the 'range' argument is encoded as 4 bytes, organized as
1 'hi_1:lo_1:hi_2:lo_2'. The '__builtin_byte_in_range' function returns a
1 non-zero value if and only if its 'u' argument is within the range
1 bounded between 'lo_2' and 'hi_2' inclusive. The
1 '__builtin_byte_in_either_range' function returns non-zero if and only
1 if its 'u' argument is within either the range bounded between 'lo_1'
1 and 'hi_1' inclusive or the range bounded between 'lo_2' and 'hi_2'
1 inclusive.
1
1 The '__builtin_dfp_dtstsfi_lt' function returns a non-zero value if and
1 only if the number of signficant digits of its 'value' argument is less
1 than its 'comparison' argument. The '__builtin_dfp_dtstsfi_lt_dd' and
1 '__builtin_dfp_dtstsfi_lt_td' functions behave similarly, but require
1 that the type of the 'value' argument be '__Decimal64' and
1 '__Decimal128' respectively.
1
1 The '__builtin_dfp_dtstsfi_gt' function returns a non-zero value if and
1 only if the number of signficant digits of its 'value' argument is
1 greater than its 'comparison' argument. The
1 '__builtin_dfp_dtstsfi_gt_dd' and '__builtin_dfp_dtstsfi_gt_td'
1 functions behave similarly, but require that the type of the 'value'
1 argument be '__Decimal64' and '__Decimal128' respectively.
1
1 The '__builtin_dfp_dtstsfi_eq' function returns a non-zero value if and
1 only if the number of signficant digits of its 'value' argument equals
1 its 'comparison' argument. The '__builtin_dfp_dtstsfi_eq_dd' and
1 '__builtin_dfp_dtstsfi_eq_td' functions behave similarly, but require
1 that the type of the 'value' argument be '__Decimal64' and
1 '__Decimal128' respectively.
1
1 The '__builtin_dfp_dtstsfi_ov' function returns a non-zero value if and
1 only if its 'value' argument has an undefined number of significant
1 digits, such as when 'value' is an encoding of 'NaN'. The
1 '__builtin_dfp_dtstsfi_ov_dd' and '__builtin_dfp_dtstsfi_ov_td'
1 functions behave similarly, but require that the type of the 'value'
1 argument be '__Decimal64' and '__Decimal128' respectively.
1
1 The following built-in functions are also available for the PowerPC
1 family of processors, starting with ISA 3.0 or later ('-mcpu=power9').
1 These string functions are described separately in order to group the
1 descriptions closer to the function prototypes:
1 int vec_all_nez (vector signed char, vector signed char);
1 int vec_all_nez (vector unsigned char, vector unsigned char);
1 int vec_all_nez (vector signed short, vector signed short);
1 int vec_all_nez (vector unsigned short, vector unsigned short);
1 int vec_all_nez (vector signed int, vector signed int);
1 int vec_all_nez (vector unsigned int, vector unsigned int);
1
1 int vec_any_eqz (vector signed char, vector signed char);
1 int vec_any_eqz (vector unsigned char, vector unsigned char);
1 int vec_any_eqz (vector signed short, vector signed short);
1 int vec_any_eqz (vector unsigned short, vector unsigned short);
1 int vec_any_eqz (vector signed int, vector signed int);
1 int vec_any_eqz (vector unsigned int, vector unsigned int);
1
1 vector bool char vec_cmpnez (vector signed char arg1, vector signed char arg2);
1 vector bool char vec_cmpnez (vector unsigned char arg1, vector unsigned char arg2);
1 vector bool short vec_cmpnez (vector signed short arg1, vector signed short arg2);
1 vector bool short vec_cmpnez (vector unsigned short arg1, vector unsigned short arg2);
1 vector bool int vec_cmpnez (vector signed int arg1, vector signed int arg2);
1 vector bool int vec_cmpnez (vector unsigned int, vector unsigned int);
1
1 vector signed char vec_cnttz (vector signed char);
1 vector unsigned char vec_cnttz (vector unsigned char);
1 vector signed short vec_cnttz (vector signed short);
1 vector unsigned short vec_cnttz (vector unsigned short);
1 vector signed int vec_cnttz (vector signed int);
1 vector unsigned int vec_cnttz (vector unsigned int);
1 vector signed long long vec_cnttz (vector signed long long);
1 vector unsigned long long vec_cnttz (vector unsigned long long);
1
1 signed int vec_cntlz_lsbb (vector signed char);
1 signed int vec_cntlz_lsbb (vector unsigned char);
1
1 signed int vec_cnttz_lsbb (vector signed char);
1 signed int vec_cnttz_lsbb (vector unsigned char);
1
1 unsigned int vec_first_match_index (vector signed char, vector signed char);
1 unsigned int vec_first_match_index (vector unsigned char,
1 vector unsigned char);
1 unsigned int vec_first_match_index (vector signed int, vector signed int);
1 unsigned int vec_first_match_index (vector unsigned int, vector unsigned int);
1 unsigned int vec_first_match_index (vector signed short, vector signed short);
1 unsigned int vec_first_match_index (vector unsigned short,
1 vector unsigned short);
1 unsigned int vec_first_match_or_eos_index (vector signed char,
1 vector signed char);
1 unsigned int vec_first_match_or_eos_index (vector unsigned char,
1 vector unsigned char);
1 unsigned int vec_first_match_or_eos_index (vector signed int,
1 vector signed int);
1 unsigned int vec_first_match_or_eos_index (vector unsigned int,
1 vector unsigned int);
1 unsigned int vec_first_match_or_eos_index (vector signed short,
1 vector signed short);
1 unsigned int vec_first_match_or_eos_index (vector unsigned short,
1 vector unsigned short);
1 unsigned int vec_first_mismatch_index (vector signed char,
1 vector signed char);
1 unsigned int vec_first_mismatch_index (vector unsigned char,
1 vector unsigned char);
1 unsigned int vec_first_mismatch_index (vector signed int,
1 vector signed int);
1 unsigned int vec_first_mismatch_index (vector unsigned int,
1 vector unsigned int);
1 unsigned int vec_first_mismatch_index (vector signed short,
1 vector signed short);
1 unsigned int vec_first_mismatch_index (vector unsigned short,
1 vector unsigned short);
1 unsigned int vec_first_mismatch_or_eos_index (vector signed char,
1 vector signed char);
1 unsigned int vec_first_mismatch_or_eos_index (vector unsigned char,
1 vector unsigned char);
1 unsigned int vec_first_mismatch_or_eos_index (vector signed int,
1 vector signed int);
1 unsigned int vec_first_mismatch_or_eos_index (vector unsigned int,
1 vector unsigned int);
1 unsigned int vec_first_mismatch_or_eos_index (vector signed short,
1 vector signed short);
1 unsigned int vec_first_mismatch_or_eos_index (vector unsigned short,
1 vector unsigned short);
1
1 vector unsigned short vec_pack_to_short_fp32 (vector float, vector float);
1
1 vector signed char vec_xl_be (signed long long, signed char *);
1 vector unsigned char vec_xl_be (signed long long, unsigned char *);
1 vector signed int vec_xl_be (signed long long, signed int *);
1 vector unsigned int vec_xl_be (signed long long, unsigned int *);
1 vector signed __int128 vec_xl_be (signed long long, signed __int128 *);
1 vector unsigned __int128 vec_xl_be (signed long long, unsigned __int128 *);
1 vector signed long long vec_xl_be (signed long long, signed long long *);
1 vector unsigned long long vec_xl_be (signed long long, unsigned long long *);
1 vector signed short vec_xl_be (signed long long, signed short *);
1 vector unsigned short vec_xl_be (signed long long, unsigned short *);
1 vector double vec_xl_be (signed long long, double *);
1 vector float vec_xl_be (signed long long, float *);
1
1 vector signed char vec_xl_len (signed char *addr, size_t len);
1 vector unsigned char vec_xl_len (unsigned char *addr, size_t len);
1 vector signed int vec_xl_len (signed int *addr, size_t len);
1 vector unsigned int vec_xl_len (unsigned int *addr, size_t len);
1 vector signed __int128 vec_xl_len (signed __int128 *addr, size_t len);
1 vector unsigned __int128 vec_xl_len (unsigned __int128 *addr, size_t len);
1 vector signed long long vec_xl_len (signed long long *addr, size_t len);
1 vector unsigned long long vec_xl_len (unsigned long long *addr, size_t len);
1 vector signed short vec_xl_len (signed short *addr, size_t len);
1 vector unsigned short vec_xl_len (unsigned short *addr, size_t len);
1 vector double vec_xl_len (double *addr, size_t len);
1 vector float vec_xl_len (float *addr, size_t len);
1
1 vector unsigned char vec_xl_len_r (unsigned char *addr, size_t len);
1
1 void vec_xst_len (vector signed char data, signed char *addr, size_t len);
1 void vec_xst_len (vector unsigned char data, unsigned char *addr, size_t len);
1 void vec_xst_len (vector signed int data, signed int *addr, size_t len);
1 void vec_xst_len (vector unsigned int data, unsigned int *addr, size_t len);
1 void vec_xst_len (vector unsigned __int128 data, unsigned __int128 *addr, size_t len);
1 void vec_xst_len (vector signed long long data, signed long long *addr, size_t len);
1 void vec_xst_len (vector unsigned long long data, unsigned long long *addr, size_t len);
1 void vec_xst_len (vector signed short data, signed short *addr, size_t len);
1 void vec_xst_len (vector unsigned short data, unsigned short *addr, size_t len);
1 void vec_xst_len (vector signed __int128 data, signed __int128 *addr, size_t len);
1 void vec_xst_len (vector double data, double *addr, size_t len);
1 void vec_xst_len (vector float data, float *addr, size_t len);
1
1 void vec_xst_len_r (vector unsigned char data, unsigned char *addr, size_t len);
1
1 signed char vec_xlx (unsigned int index, vector signed char data);
1 unsigned char vec_xlx (unsigned int index, vector unsigned char data);
1 signed short vec_xlx (unsigned int index, vector signed short data);
1 unsigned short vec_xlx (unsigned int index, vector unsigned short data);
1 signed int vec_xlx (unsigned int index, vector signed int data);
1 unsigned int vec_xlx (unsigned int index, vector unsigned int data);
1 float vec_xlx (unsigned int index, vector float data);
1
1 signed char vec_xrx (unsigned int index, vector signed char data);
1 unsigned char vec_xrx (unsigned int index, vector unsigned char data);
1 signed short vec_xrx (unsigned int index, vector signed short data);
1 unsigned short vec_xrx (unsigned int index, vector unsigned short data);
1 signed int vec_xrx (unsigned int index, vector signed int data);
1 unsigned int vec_xrx (unsigned int index, vector unsigned int data);
1 float vec_xrx (unsigned int index, vector float data);
1
1 The 'vec_all_nez', 'vec_any_eqz', and 'vec_cmpnez' perform pairwise
1 comparisons between the elements at the same positions within their two
1 vector arguments. The 'vec_all_nez' function returns a non-zero value
1 if and only if all pairwise comparisons are not equal and no element of
1 either vector argument contains a zero. The 'vec_any_eqz' function
1 returns a non-zero value if and only if at least one pairwise comparison
1 is equal or if at least one element of either vector argument contains a
1 zero. The 'vec_cmpnez' function returns a vector of the same type as
1 its two arguments, within which each element consists of all ones to
1 denote that either the corresponding elements of the incoming arguments
1 are not equal or that at least one of the corresponding elements
1 contains zero. Otherwise, the element of the returned vector contains
1 all zeros.
1
1 The 'vec_cntlz_lsbb' function returns the count of the number of
1 consecutive leading byte elements (starting from position 0 within the
1 supplied vector argument) for which the least-significant bit equals
1 zero. The 'vec_cnttz_lsbb' function returns the count of the number of
1 consecutive trailing byte elements (starting from position 15 and
1 counting backwards within the supplied vector argument) for which the
1 least-significant bit equals zero.
1
1 The 'vec_xl_len' and 'vec_xst_len' functions require a 64-bit
1 environment supporting ISA 3.0 or later. The 'vec_xl_len' function
1 loads a variable length vector from memory. The 'vec_xst_len' function
1 stores a variable length vector to memory. With both the 'vec_xl_len'
1 and 'vec_xst_len' functions, the 'addr' argument represents the memory
1 address to or from which data will be transferred, and the 'len'
1 argument represents the number of bytes to be transferred, as computed
1 by the C expression 'min((len & 0xff), 16)'. If this expression's value
1 is not a multiple of the vector element's size, the behavior of this
1 function is undefined. In the case that the underlying computer is
1 configured to run in big-endian mode, the data transfer moves bytes 0 to
1 '(len - 1)' of the corresponding vector. In little-endian mode, the
1 data transfer moves bytes '(16 - len)' to '15' of the corresponding
1 vector. For the load function, any bytes of the result vector that are
1 not loaded from memory are set to zero. The value of the 'addr'
1 argument need not be aligned on a multiple of the vector's element size.
1
1 The 'vec_xlx' and 'vec_xrx' functions extract the single element
1 selected by the 'index' argument from the vector represented by the
1 'data' argument. The 'index' argument always specifies a byte offset,
1 regardless of the size of the vector element. With 'vec_xlx', 'index'
1 is the offset of the first byte of the element to be extracted. With
1 'vec_xrx', 'index' represents the last byte of the element to be
1 extracted, measured from the right end of the vector. In other words,
1 the last byte of the element to be extracted is found at position '(15 -
1 index)'. There is no requirement that 'index' be a multiple of the
1 vector element size. However, if the size of the vector element added
1 to 'index' is greater than 15, the content of the returned value is
1 undefined.
1
1 The following built-in functions are available for the PowerPC family
1 of processors when hardware decimal floating point ('-mhard-dfp') is
1 available:
1 long long __builtin_dxex (_Decimal64);
1 long long __builtin_dxexq (_Decimal128);
1 _Decimal64 __builtin_ddedpd (int, _Decimal64);
1 _Decimal128 __builtin_ddedpdq (int, _Decimal128);
1 _Decimal64 __builtin_denbcd (int, _Decimal64);
1 _Decimal128 __builtin_denbcdq (int, _Decimal128);
1 _Decimal64 __builtin_diex (long long, _Decimal64);
1 _Decimal128 _builtin_diexq (long long, _Decimal128);
1 _Decimal64 __builtin_dscli (_Decimal64, int);
1 _Decimal128 __builtin_dscliq (_Decimal128, int);
1 _Decimal64 __builtin_dscri (_Decimal64, int);
1 _Decimal128 __builtin_dscriq (_Decimal128, int);
1 unsigned long long __builtin_unpack_dec128 (_Decimal128, int);
1 _Decimal128 __builtin_pack_dec128 (unsigned long long, unsigned long long);
1
1 The following built-in functions are available for the PowerPC family
1 of processors when the Vector Scalar (vsx) instruction set is available:
1 unsigned long long __builtin_unpack_vector_int128 (vector __int128_t, int);
1 vector __int128_t __builtin_pack_vector_int128 (unsigned long long,
1 unsigned long long);
1