gcc: Nios II Options
1
1 3.18.32 Nios II Options
1 -----------------------
1
1 These are the options defined for the Altera Nios II processor.
1
1 '-G NUM'
1 Put global and static objects less than or equal to NUM bytes into
1 the small data or BSS sections instead of the normal data or BSS
1 sections. The default value of NUM is 8.
1
1 '-mgpopt=OPTION'
1 '-mgpopt'
1 '-mno-gpopt'
1 Generate (do not generate) GP-relative accesses. The following
1 OPTION names are recognized:
1
1 'none'
1 Do not generate GP-relative accesses.
1
1 'local'
1 Generate GP-relative accesses for small data objects that are
1 not external, weak, or uninitialized common symbols. Also use
1 GP-relative addressing for objects that have been explicitly
1 placed in a small data section via a 'section' attribute.
1
1 'global'
1 As for 'local', but also generate GP-relative accesses for
1 small data objects that are external, weak, or common. If you
1 use this option, you must ensure that all parts of your
1 program (including libraries) are compiled with the same '-G'
1 setting.
1
1 'data'
1 Generate GP-relative accesses for all data objects in the
1 program. If you use this option, the entire data and BSS
1 segments of your program must fit in 64K of memory and you
1 must use an appropriate linker script to allocate them within
1 the addressable range of the global pointer.
1
1 'all'
1 Generate GP-relative addresses for function pointers as well
1 as data pointers. If you use this option, the entire text,
1 data, and BSS segments of your program must fit in 64K of
1 memory and you must use an appropriate linker script to
1 allocate them within the addressable range of the global
1 pointer.
1
1 '-mgpopt' is equivalent to '-mgpopt=local', and '-mno-gpopt' is
1 equivalent to '-mgpopt=none'.
1
1 The default is '-mgpopt' except when '-fpic' or '-fPIC' is
1 specified to generate position-independent code. Note that the
1 Nios II ABI does not permit GP-relative accesses from shared
1 libraries.
1
1 You may need to specify '-mno-gpopt' explicitly when building
1 programs that include large amounts of small data, including large
1 GOT data sections. In this case, the 16-bit offset for GP-relative
1 addressing may not be large enough to allow access to the entire
1 small data section.
1
1 '-mgprel-sec=REGEXP'
1 This option specifies additional section names that can be accessed
1 via GP-relative addressing. It is most useful in conjunction with
11 'section' attributes on variable declarations (⇒Common
Variable Attributes) and a custom linker script. The REGEXP is a
1 POSIX Extended Regular Expression.
1
1 This option does not affect the behavior of the '-G' option, and
1 the specified sections are in addition to the standard '.sdata' and
1 '.sbss' small-data sections that are recognized by '-mgpopt'.
1
1 '-mr0rel-sec=REGEXP'
1 This option specifies names of sections that can be accessed via a
1 16-bit offset from 'r0'; that is, in the low 32K or high 32K of the
1 32-bit address space. It is most useful in conjunction with
11 'section' attributes on variable declarations (⇒Common
Variable Attributes) and a custom linker script. The REGEXP is a
1 POSIX Extended Regular Expression.
1
1 In contrast to the use of GP-relative addressing for small data,
1 zero-based addressing is never generated by default and there are
1 no conventional section names used in standard linker scripts for
1 sections in the low or high areas of memory.
1
1 '-mel'
1 '-meb'
1 Generate little-endian (default) or big-endian (experimental) code,
1 respectively.
1
1 '-march=ARCH'
1 This specifies the name of the target Nios II architecture. GCC
1 uses this name to determine what kind of instructions it can emit
1 when generating assembly code. Permissible names are: 'r1', 'r2'.
1
1 The preprocessor macro '__nios2_arch__' is available to programs,
1 with value 1 or 2, indicating the targeted ISA level.
1
1 '-mbypass-cache'
1 '-mno-bypass-cache'
1 Force all load and store instructions to always bypass cache by
1 using I/O variants of the instructions. The default is not to
1 bypass the cache.
1
1 '-mno-cache-volatile'
1 '-mcache-volatile'
1 Volatile memory access bypass the cache using the I/O variants of
1 the load and store instructions. The default is not to bypass the
1 cache.
1
1 '-mno-fast-sw-div'
1 '-mfast-sw-div'
1 Do not use table-based fast divide for small numbers. The default
1 is to use the fast divide at '-O3' and above.
1
1 '-mno-hw-mul'
1 '-mhw-mul'
1 '-mno-hw-mulx'
1 '-mhw-mulx'
1 '-mno-hw-div'
1 '-mhw-div'
1 Enable or disable emitting 'mul', 'mulx' and 'div' family of
1 instructions by the compiler. The default is to emit 'mul' and not
1 emit 'div' and 'mulx'.
1
1 '-mbmx'
1 '-mno-bmx'
1 '-mcdx'
1 '-mno-cdx'
1 Enable or disable generation of Nios II R2 BMX (bit manipulation)
1 and CDX (code density) instructions. Enabling these instructions
1 also requires '-march=r2'. Since these instructions are optional
1 extensions to the R2 architecture, the default is not to emit them.
1
1 '-mcustom-INSN=N'
1 '-mno-custom-INSN'
1 Each '-mcustom-INSN=N' option enables use of a custom instruction
1 with encoding N when generating code that uses INSN. For example,
1 '-mcustom-fadds=253' generates custom instruction 253 for
1 single-precision floating-point add operations instead of the
1 default behavior of using a library call.
1
1 The following values of INSN are supported. Except as otherwise
1 noted, floating-point operations are expected to be implemented
1 with normal IEEE 754 semantics and correspond directly to the C
11 operators or the equivalent GCC built-in functions (⇒Other
Builtins).
1
1 Single-precision floating point:
1
1 'fadds', 'fsubs', 'fdivs', 'fmuls'
1 Binary arithmetic operations.
1
1 'fnegs'
1 Unary negation.
1
1 'fabss'
1 Unary absolute value.
1
1 'fcmpeqs', 'fcmpges', 'fcmpgts', 'fcmples', 'fcmplts', 'fcmpnes'
1 Comparison operations.
1
1 'fmins', 'fmaxs'
1 Floating-point minimum and maximum. These instructions are
1 only generated if '-ffinite-math-only' is specified.
1
1 'fsqrts'
1 Unary square root operation.
1
1 'fcoss', 'fsins', 'ftans', 'fatans', 'fexps', 'flogs'
1 Floating-point trigonometric and exponential functions. These
1 instructions are only generated if
1 '-funsafe-math-optimizations' is also specified.
1
1 Double-precision floating point:
1
1 'faddd', 'fsubd', 'fdivd', 'fmuld'
1 Binary arithmetic operations.
1
1 'fnegd'
1 Unary negation.
1
1 'fabsd'
1 Unary absolute value.
1
1 'fcmpeqd', 'fcmpged', 'fcmpgtd', 'fcmpled', 'fcmpltd', 'fcmpned'
1 Comparison operations.
1
1 'fmind', 'fmaxd'
1 Double-precision minimum and maximum. These instructions are
1 only generated if '-ffinite-math-only' is specified.
1
1 'fsqrtd'
1 Unary square root operation.
1
1 'fcosd', 'fsind', 'ftand', 'fatand', 'fexpd', 'flogd'
1 Double-precision trigonometric and exponential functions.
1 These instructions are only generated if
1 '-funsafe-math-optimizations' is also specified.
1
1 Conversions:
1 'fextsd'
1 Conversion from single precision to double precision.
1
1 'ftruncds'
1 Conversion from double precision to single precision.
1
1 'fixsi', 'fixsu', 'fixdi', 'fixdu'
1 Conversion from floating point to signed or unsigned integer
1 types, with truncation towards zero.
1
1 'round'
1 Conversion from single-precision floating point to signed
1 integer, rounding to the nearest integer and ties away from
1 zero. This corresponds to the '__builtin_lroundf' function
1 when '-fno-math-errno' is used.
1
1 'floatis', 'floatus', 'floatid', 'floatud'
1 Conversion from signed or unsigned integer types to
1 floating-point types.
1
1 In addition, all of the following transfer instructions for
1 internal registers X and Y must be provided to use any of the
1 double-precision floating-point instructions. Custom instructions
1 taking two double-precision source operands expect the first
1 operand in the 64-bit register X. The other operand (or only
1 operand of a unary operation) is given to the custom arithmetic
1 instruction with the least significant half in source register SRC1
1 and the most significant half in SRC2. A custom instruction that
1 returns a double-precision result returns the most significant 32
1 bits in the destination register and the other half in 32-bit
1 register Y. GCC automatically generates the necessary code
1 sequences to write register X and/or read register Y when
1 double-precision floating-point instructions are used.
1
1 'fwrx'
1 Write SRC1 into the least significant half of X and SRC2 into
1 the most significant half of X.
1
1 'fwry'
1 Write SRC1 into Y.
1
1 'frdxhi', 'frdxlo'
1 Read the most or least (respectively) significant half of X
1 and store it in DEST.
1
1 'frdy'
1 Read the value of Y and store it into DEST.
1
1 Note that you can gain more local control over generation of Nios
1 II custom instructions by using the 'target("custom-INSN=N")' and
11 Attributes::) or pragmas (⇒Function Specific Option
Pragmas).
1
1 '-mcustom-fpu-cfg=NAME'
1
1 This option enables a predefined, named set of custom instruction
1 encodings (see '-mcustom-INSN' above). Currently, the following
1 sets are defined:
1
1 '-mcustom-fpu-cfg=60-1' is equivalent to:
1 -mcustom-fmuls=252
1 -mcustom-fadds=253
1 -mcustom-fsubs=254
1 -fsingle-precision-constant
1
1 '-mcustom-fpu-cfg=60-2' is equivalent to:
1 -mcustom-fmuls=252
1 -mcustom-fadds=253
1 -mcustom-fsubs=254
1 -mcustom-fdivs=255
1 -fsingle-precision-constant
1
1 '-mcustom-fpu-cfg=72-3' is equivalent to:
1 -mcustom-floatus=243
1 -mcustom-fixsi=244
1 -mcustom-floatis=245
1 -mcustom-fcmpgts=246
1 -mcustom-fcmples=249
1 -mcustom-fcmpeqs=250
1 -mcustom-fcmpnes=251
1 -mcustom-fmuls=252
1 -mcustom-fadds=253
1 -mcustom-fsubs=254
1 -mcustom-fdivs=255
1 -fsingle-precision-constant
1
1 Custom instruction assignments given by individual '-mcustom-INSN='
1 options override those given by '-mcustom-fpu-cfg=', regardless of
1 the order of the options on the command line.
1
1 Note that you can gain more local control over selection of a FPU
1 configuration by using the 'target("custom-fpu-cfg=NAME")' function
DONTPRINTYET 1 attribute (⇒Function Attributes) or pragma (*noteFunction
1DONTPRINTYET 1 attribute (⇒Function Attributes) or pragma (⇒Function
Specific Option Pragmas).
1
1 These additional '-m' options are available for the Altera Nios II ELF
1 (bare-metal) target:
1
1 '-mhal'
1 Link with HAL BSP. This suppresses linking with the GCC-provided C
1 runtime startup and termination code, and is typically used in
1 conjunction with '-msys-crt0=' to specify the location of the
1 alternate startup code provided by the HAL BSP.
1
1 '-msmallc'
1 Link with a limited version of the C library, '-lsmallc', rather
1 than Newlib.
1
1 '-msys-crt0=STARTFILE'
1 STARTFILE is the file name of the startfile (crt0) to use when
1 linking. This option is only useful in conjunction with '-mhal'.
1
1 '-msys-lib=SYSTEMLIB'
1 SYSTEMLIB is the library name of the library that provides
1 low-level system calls required by the C library, e.g. 'read' and
1 'write'. This option is typically used to link with a library
1 provided by a HAL BSP.
1