gcc: M680x0 Options
1
1 3.18.22 M680x0 Options
1 ----------------------
1
1 These are the '-m' options defined for M680x0 and ColdFire processors.
1 The default settings depend on which architecture was selected when the
1 compiler was configured; the defaults for the most common choices are
1 given below.
1
1 '-march=ARCH'
1 Generate code for a specific M680x0 or ColdFire instruction set
1 architecture. Permissible values of ARCH for M680x0 architectures
1 are: '68000', '68010', '68020', '68030', '68040', '68060' and
1 'cpu32'. ColdFire architectures are selected according to
1 Freescale's ISA classification and the permissible values are:
1 'isaa', 'isaaplus', 'isab' and 'isac'.
1
1 GCC defines a macro '__mcfARCH__' whenever it is generating code
1 for a ColdFire target. The ARCH in this macro is one of the
1 '-march' arguments given above.
1
1 When used together, '-march' and '-mtune' select code that runs on
1 a family of similar processors but that is optimized for a
1 particular microarchitecture.
1
1 '-mcpu=CPU'
1 Generate code for a specific M680x0 or ColdFire processor. The
1 M680x0 CPUs are: '68000', '68010', '68020', '68030', '68040',
1 '68060', '68302', '68332' and 'cpu32'. The ColdFire CPUs are given
1 by the table below, which also classifies the CPUs into families:
1
1 *Family* *'-mcpu' arguments*
1 '51' '51' '51ac' '51ag' '51cn' '51em' '51je' '51jf' '51jg'
1 '51jm' '51mm' '51qe' '51qm'
1 '5206' '5202' '5204' '5206'
1 '5206e' '5206e'
1 '5208' '5207' '5208'
1 '5211a' '5210a' '5211a'
1 '5213' '5211' '5212' '5213'
1 '5216' '5214' '5216'
1 '52235' '52230' '52231' '52232' '52233' '52234' '52235'
1 '5225' '5224' '5225'
1 '52259' '52252' '52254' '52255' '52256' '52258' '52259'
1 '5235' '5232' '5233' '5234' '5235' '523x'
1 '5249' '5249'
1 '5250' '5250'
1 '5271' '5270' '5271'
1 '5272' '5272'
1 '5275' '5274' '5275'
1 '5282' '5280' '5281' '5282' '528x'
1 '53017' '53011' '53012' '53013' '53014' '53015' '53016' '53017'
1 '5307' '5307'
1 '5329' '5327' '5328' '5329' '532x'
1 '5373' '5372' '5373' '537x'
1 '5407' '5407'
1 '5475' '5470' '5471' '5472' '5473' '5474' '5475' '547x' '5480'
1 '5481' '5482' '5483' '5484' '5485'
1
1 '-mcpu=CPU' overrides '-march=ARCH' if ARCH is compatible with CPU.
1 Other combinations of '-mcpu' and '-march' are rejected.
1
1 GCC defines the macro '__mcf_cpu_CPU' when ColdFire target CPU is
1 selected. It also defines '__mcf_family_FAMILY', where the value
1 of FAMILY is given by the table above.
1
1 '-mtune=TUNE'
1 Tune the code for a particular microarchitecture within the
1 constraints set by '-march' and '-mcpu'. The M680x0
1 microarchitectures are: '68000', '68010', '68020', '68030',
1 '68040', '68060' and 'cpu32'. The ColdFire microarchitectures are:
1 'cfv1', 'cfv2', 'cfv3', 'cfv4' and 'cfv4e'.
1
1 You can also use '-mtune=68020-40' for code that needs to run
1 relatively well on 68020, 68030 and 68040 targets.
1 '-mtune=68020-60' is similar but includes 68060 targets as well.
1 These two options select the same tuning decisions as '-m68020-40'
1 and '-m68020-60' respectively.
1
1 GCC defines the macros '__mcARCH' and '__mcARCH__' when tuning for
1 680x0 architecture ARCH. It also defines 'mcARCH' unless either
1 '-ansi' or a non-GNU '-std' option is used. If GCC is tuning for a
1 range of architectures, as selected by '-mtune=68020-40' or
1 '-mtune=68020-60', it defines the macros for every architecture in
1 the range.
1
1 GCC also defines the macro '__mUARCH__' when tuning for ColdFire
1 microarchitecture UARCH, where UARCH is one of the arguments given
1 above.
1
1 '-m68000'
1 '-mc68000'
1 Generate output for a 68000. This is the default when the compiler
1 is configured for 68000-based systems. It is equivalent to
1 '-march=68000'.
1
1 Use this option for microcontrollers with a 68000 or EC000 core,
1 including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
1
1 '-m68010'
1 Generate output for a 68010. This is the default when the compiler
1 is configured for 68010-based systems. It is equivalent to
1 '-march=68010'.
1
1 '-m68020'
1 '-mc68020'
1 Generate output for a 68020. This is the default when the compiler
1 is configured for 68020-based systems. It is equivalent to
1 '-march=68020'.
1
1 '-m68030'
1 Generate output for a 68030. This is the default when the compiler
1 is configured for 68030-based systems. It is equivalent to
1 '-march=68030'.
1
1 '-m68040'
1 Generate output for a 68040. This is the default when the compiler
1 is configured for 68040-based systems. It is equivalent to
1 '-march=68040'.
1
1 This option inhibits the use of 68881/68882 instructions that have
1 to be emulated by software on the 68040. Use this option if your
1 68040 does not have code to emulate those instructions.
1
1 '-m68060'
1 Generate output for a 68060. This is the default when the compiler
1 is configured for 68060-based systems. It is equivalent to
1 '-march=68060'.
1
1 This option inhibits the use of 68020 and 68881/68882 instructions
1 that have to be emulated by software on the 68060. Use this option
1 if your 68060 does not have code to emulate those instructions.
1
1 '-mcpu32'
1 Generate output for a CPU32. This is the default when the compiler
1 is configured for CPU32-based systems. It is equivalent to
1 '-march=cpu32'.
1
1 Use this option for microcontrollers with a CPU32 or CPU32+ core,
1 including the 68330, 68331, 68332, 68333, 68334, 68336, 68340,
1 68341, 68349 and 68360.
1
1 '-m5200'
1 Generate output for a 520X ColdFire CPU. This is the default when
1 the compiler is configured for 520X-based systems. It is
1 equivalent to '-mcpu=5206', and is now deprecated in favor of that
1 option.
1
1 Use this option for microcontroller with a 5200 core, including the
1 MCF5202, MCF5203, MCF5204 and MCF5206.
1
1 '-m5206e'
1 Generate output for a 5206e ColdFire CPU. The option is now
1 deprecated in favor of the equivalent '-mcpu=5206e'.
1
1 '-m528x'
1 Generate output for a member of the ColdFire 528X family. The
1 option is now deprecated in favor of the equivalent '-mcpu=528x'.
1
1 '-m5307'
1 Generate output for a ColdFire 5307 CPU. The option is now
1 deprecated in favor of the equivalent '-mcpu=5307'.
1
1 '-m5407'
1 Generate output for a ColdFire 5407 CPU. The option is now
1 deprecated in favor of the equivalent '-mcpu=5407'.
1
1 '-mcfv4e'
1 Generate output for a ColdFire V4e family CPU (e.g. 547x/548x).
1 This includes use of hardware floating-point instructions. The
1 option is equivalent to '-mcpu=547x', and is now deprecated in
1 favor of that option.
1
1 '-m68020-40'
1 Generate output for a 68040, without using any of the new
1 instructions. This results in code that can run relatively
1 efficiently on either a 68020/68881 or a 68030 or a 68040. The
1 generated code does use the 68881 instructions that are emulated on
1 the 68040.
1
1 The option is equivalent to '-march=68020' '-mtune=68020-40'.
1
1 '-m68020-60'
1 Generate output for a 68060, without using any of the new
1 instructions. This results in code that can run relatively
1 efficiently on either a 68020/68881 or a 68030 or a 68040. The
1 generated code does use the 68881 instructions that are emulated on
1 the 68060.
1
1 The option is equivalent to '-march=68020' '-mtune=68020-60'.
1
1 '-mhard-float'
1 '-m68881'
1 Generate floating-point instructions. This is the default for
1 68020 and above, and for ColdFire devices that have an FPU. It
1 defines the macro '__HAVE_68881__' on M680x0 targets and
1 '__mcffpu__' on ColdFire targets.
1
1 '-msoft-float'
1 Do not generate floating-point instructions; use library calls
1 instead. This is the default for 68000, 68010, and 68832 targets.
1 It is also the default for ColdFire devices that have no FPU.
1
1 '-mdiv'
1 '-mno-div'
1 Generate (do not generate) ColdFire hardware divide and remainder
1 instructions. If '-march' is used without '-mcpu', the default is
1 "on" for ColdFire architectures and "off" for M680x0 architectures.
1 Otherwise, the default is taken from the target CPU (either the
1 default CPU, or the one specified by '-mcpu'). For example, the
1 default is "off" for '-mcpu=5206' and "on" for '-mcpu=5206e'.
1
1 GCC defines the macro '__mcfhwdiv__' when this option is enabled.
1
1 '-mshort'
1 Consider type 'int' to be 16 bits wide, like 'short int'.
1 Additionally, parameters passed on the stack are also aligned to a
1 16-bit boundary even on targets whose API mandates promotion to
1 32-bit.
1
1 '-mno-short'
1 Do not consider type 'int' to be 16 bits wide. This is the
1 default.
1
1 '-mnobitfield'
1 '-mno-bitfield'
1 Do not use the bit-field instructions. The '-m68000', '-mcpu32'
1 and '-m5200' options imply '-mnobitfield'.
1
1 '-mbitfield'
1 Do use the bit-field instructions. The '-m68020' option implies
1 '-mbitfield'. This is the default if you use a configuration
1 designed for a 68020.
1
1 '-mrtd'
1 Use a different function-calling convention, in which functions
1 that take a fixed number of arguments return with the 'rtd'
1 instruction, which pops their arguments while returning. This
1 saves one instruction in the caller since there is no need to pop
1 the arguments there.
1
1 This calling convention is incompatible with the one normally used
1 on Unix, so you cannot use it if you need to call libraries
1 compiled with the Unix compiler.
1
1 Also, you must provide function prototypes for all functions that
1 take variable numbers of arguments (including 'printf'); otherwise
1 incorrect code is generated for calls to those functions.
1
1 In addition, seriously incorrect code results if you call a
1 function with too many arguments. (Normally, extra arguments are
1 harmlessly ignored.)
1
1 The 'rtd' instruction is supported by the 68010, 68020, 68030,
1 68040, 68060 and CPU32 processors, but not by the 68000 or 5200.
1
1 '-mno-rtd'
1 Do not use the calling conventions selected by '-mrtd'. This is
1 the default.
1
1 '-malign-int'
1 '-mno-align-int'
1 Control whether GCC aligns 'int', 'long', 'long long', 'float',
1 'double', and 'long double' variables on a 32-bit boundary
1 ('-malign-int') or a 16-bit boundary ('-mno-align-int'). Aligning
1 variables on 32-bit boundaries produces code that runs somewhat
1 faster on processors with 32-bit busses at the expense of more
1 memory.
1
1 *Warning:* if you use the '-malign-int' switch, GCC aligns
1 structures containing the above types differently than most
1 published application binary interface specifications for the m68k.
1
1 '-mpcrel'
1 Use the pc-relative addressing mode of the 68000 directly, instead
1 of using a global offset table. At present, this option implies
1 '-fpic', allowing at most a 16-bit offset for pc-relative
1 addressing. '-fPIC' is not presently supported with '-mpcrel',
1 though this could be supported for 68020 and higher processors.
1
1 '-mno-strict-align'
1 '-mstrict-align'
1 Do not (do) assume that unaligned memory references are handled by
1 the system.
1
1 '-msep-data'
1 Generate code that allows the data segment to be located in a
1 different area of memory from the text segment. This allows for
1 execute-in-place in an environment without virtual memory
1 management. This option implies '-fPIC'.
1
1 '-mno-sep-data'
1 Generate code that assumes that the data segment follows the text
1 segment. This is the default.
1
1 '-mid-shared-library'
1 Generate code that supports shared libraries via the library ID
1 method. This allows for execute-in-place and shared libraries in
1 an environment without virtual memory management. This option
1 implies '-fPIC'.
1
1 '-mno-id-shared-library'
1 Generate code that doesn't assume ID-based shared libraries are
1 being used. This is the default.
1
1 '-mshared-library-id=n'
1 Specifies the identification number of the ID-based shared library
1 being compiled. Specifying a value of 0 generates more compact
1 code; specifying other values forces the allocation of that number
1 to the current library, but is no more space- or time-efficient
1 than omitting this option.
1
1 '-mxgot'
1 '-mno-xgot'
1 When generating position-independent code for ColdFire, generate
1 code that works if the GOT has more than 8192 entries. This code
1 is larger and slower than code generated without this option. On
1 M680x0 processors, this option is not needed; '-fPIC' suffices.
1
1 GCC normally uses a single instruction to load values from the GOT.
1 While this is relatively efficient, it only works if the GOT is
1 smaller than about 64k. Anything larger causes the linker to
1 report an error such as:
1
1 relocation truncated to fit: R_68K_GOT16O foobar
1
1 If this happens, you should recompile your code with '-mxgot'. It
1 should then work with very large GOTs. However, code generated
1 with '-mxgot' is less efficient, since it takes 4 instructions to
1 fetch the value of a global symbol.
1
1 Note that some linkers, including newer versions of the GNU linker,
1 can create multiple GOTs and sort GOT entries. If you have such a
1 linker, you should only need to use '-mxgot' when compiling a
1 single object file that accesses more than 8192 GOT entries. Very
1 few do.
1
1 These options have no effect unless GCC is generating
1 position-independent code.
1
1 '-mlong-jump-table-offsets'
1 Use 32-bit offsets in 'switch' tables. The default is to use
1 16-bit offsets.
1