gcc: IA-64 Options
1
1 3.18.18 IA-64 Options
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1
1 These are the '-m' options defined for the Intel IA-64 architecture.
1
1 '-mbig-endian'
1 Generate code for a big-endian target. This is the default for
1 HP-UX.
1
1 '-mlittle-endian'
1 Generate code for a little-endian target. This is the default for
1 AIX5 and GNU/Linux.
1
1 '-mgnu-as'
1 '-mno-gnu-as'
1 Generate (or don't) code for the GNU assembler. This is the
1 default.
1
1 '-mgnu-ld'
1 '-mno-gnu-ld'
1 Generate (or don't) code for the GNU linker. This is the default.
1
1 '-mno-pic'
1 Generate code that does not use a global pointer register. The
1 result is not position independent code, and violates the IA-64
1 ABI.
1
1 '-mvolatile-asm-stop'
1 '-mno-volatile-asm-stop'
1 Generate (or don't) a stop bit immediately before and after
1 volatile asm statements.
1
1 '-mregister-names'
1 '-mno-register-names'
1 Generate (or don't) 'in', 'loc', and 'out' register names for the
1 stacked registers. This may make assembler output more readable.
1
1 '-mno-sdata'
1 '-msdata'
1 Disable (or enable) optimizations that use the small data section.
1 This may be useful for working around optimizer bugs.
1
1 '-mconstant-gp'
1 Generate code that uses a single constant global pointer value.
1 This is useful when compiling kernel code.
1
1 '-mauto-pic'
1 Generate code that is self-relocatable. This implies
1 '-mconstant-gp'. This is useful when compiling firmware code.
1
1 '-minline-float-divide-min-latency'
1 Generate code for inline divides of floating-point values using the
1 minimum latency algorithm.
1
1 '-minline-float-divide-max-throughput'
1 Generate code for inline divides of floating-point values using the
1 maximum throughput algorithm.
1
1 '-mno-inline-float-divide'
1 Do not generate inline code for divides of floating-point values.
1
1 '-minline-int-divide-min-latency'
1 Generate code for inline divides of integer values using the
1 minimum latency algorithm.
1
1 '-minline-int-divide-max-throughput'
1 Generate code for inline divides of integer values using the
1 maximum throughput algorithm.
1
1 '-mno-inline-int-divide'
1 Do not generate inline code for divides of integer values.
1
1 '-minline-sqrt-min-latency'
1 Generate code for inline square roots using the minimum latency
1 algorithm.
1
1 '-minline-sqrt-max-throughput'
1 Generate code for inline square roots using the maximum throughput
1 algorithm.
1
1 '-mno-inline-sqrt'
1 Do not generate inline code for 'sqrt'.
1
1 '-mfused-madd'
1 '-mno-fused-madd'
1 Do (don't) generate code that uses the fused multiply/add or
1 multiply/subtract instructions. The default is to use these
1 instructions.
1
1 '-mno-dwarf2-asm'
1 '-mdwarf2-asm'
1 Don't (or do) generate assembler code for the DWARF line number
1 debugging info. This may be useful when not using the GNU
1 assembler.
1
1 '-mearly-stop-bits'
1 '-mno-early-stop-bits'
1 Allow stop bits to be placed earlier than immediately preceding the
1 instruction that triggered the stop bit. This can improve
1 instruction scheduling, but does not always do so.
1
1 '-mfixed-range=REGISTER-RANGE'
1 Generate code treating the given register range as fixed registers.
1 A fixed register is one that the register allocator cannot use.
1 This is useful when compiling kernel code. A register range is
1 specified as two registers separated by a dash. Multiple register
1 ranges can be specified separated by a comma.
1
1 '-mtls-size=TLS-SIZE'
1 Specify bit size of immediate TLS offsets. Valid values are 14,
1 22, and 64.
1
1 '-mtune=CPU-TYPE'
1 Tune the instruction scheduling for a particular CPU, Valid values
1 are 'itanium', 'itanium1', 'merced', 'itanium2', and 'mckinley'.
1
1 '-milp32'
1 '-mlp64'
1 Generate code for a 32-bit or 64-bit environment. The 32-bit
1 environment sets int, long and pointer to 32 bits. The 64-bit
1 environment sets int to 32 bits and long and pointer to 64 bits.
1 These are HP-UX specific flags.
1
1 '-mno-sched-br-data-spec'
1 '-msched-br-data-spec'
1 (Dis/En)able data speculative scheduling before reload. This
1 results in generation of 'ld.a' instructions and the corresponding
1 check instructions ('ld.c' / 'chk.a'). The default setting is
1 disabled.
1
1 '-msched-ar-data-spec'
1 '-mno-sched-ar-data-spec'
1 (En/Dis)able data speculative scheduling after reload. This
1 results in generation of 'ld.a' instructions and the corresponding
1 check instructions ('ld.c' / 'chk.a'). The default setting is
1 enabled.
1
1 '-mno-sched-control-spec'
1 '-msched-control-spec'
1 (Dis/En)able control speculative scheduling. This feature is
1 available only during region scheduling (i.e. before reload). This
1 results in generation of the 'ld.s' instructions and the
1 corresponding check instructions 'chk.s'. The default setting is
1 disabled.
1
1 '-msched-br-in-data-spec'
1 '-mno-sched-br-in-data-spec'
1 (En/Dis)able speculative scheduling of the instructions that are
1 dependent on the data speculative loads before reload. This is
1 effective only with '-msched-br-data-spec' enabled. The default
1 setting is enabled.
1
1 '-msched-ar-in-data-spec'
1 '-mno-sched-ar-in-data-spec'
1 (En/Dis)able speculative scheduling of the instructions that are
1 dependent on the data speculative loads after reload. This is
1 effective only with '-msched-ar-data-spec' enabled. The default
1 setting is enabled.
1
1 '-msched-in-control-spec'
1 '-mno-sched-in-control-spec'
1 (En/Dis)able speculative scheduling of the instructions that are
1 dependent on the control speculative loads. This is effective only
1 with '-msched-control-spec' enabled. The default setting is
1 enabled.
1
1 '-mno-sched-prefer-non-data-spec-insns'
1 '-msched-prefer-non-data-spec-insns'
1 If enabled, data-speculative instructions are chosen for schedule
1 only if there are no other choices at the moment. This makes the
1 use of the data speculation much more conservative. The default
1 setting is disabled.
1
1 '-mno-sched-prefer-non-control-spec-insns'
1 '-msched-prefer-non-control-spec-insns'
1 If enabled, control-speculative instructions are chosen for
1 schedule only if there are no other choices at the moment. This
1 makes the use of the control speculation much more conservative.
1 The default setting is disabled.
1
1 '-mno-sched-count-spec-in-critical-path'
1 '-msched-count-spec-in-critical-path'
1 If enabled, speculative dependencies are considered during
1 computation of the instructions priorities. This makes the use of
1 the speculation a bit more conservative. The default setting is
1 disabled.
1
1 '-msched-spec-ldc'
1 Use a simple data speculation check. This option is on by default.
1
1 '-msched-control-spec-ldc'
1 Use a simple check for control speculation. This option is on by
1 default.
1
1 '-msched-stop-bits-after-every-cycle'
1 Place a stop bit after every cycle when scheduling. This option is
1 on by default.
1
1 '-msched-fp-mem-deps-zero-cost'
1 Assume that floating-point stores and loads are not likely to cause
1 a conflict when placed into the same instruction group. This
1 option is disabled by default.
1
1 '-msel-sched-dont-check-control-spec'
1 Generate checks for control speculation in selective scheduling.
1 This flag is disabled by default.
1
1 '-msched-max-memory-insns=MAX-INSNS'
1 Limit on the number of memory insns per instruction group, giving
1 lower priority to subsequent memory insns attempting to schedule in
1 the same instruction group. Frequently useful to prevent cache
1 bank conflicts. The default value is 1.
1
1 '-msched-max-memory-insns-hard-limit'
1 Makes the limit specified by 'msched-max-memory-insns' a hard
1 limit, disallowing more than that number in an instruction group.
1 Otherwise, the limit is "soft", meaning that non-memory operations
1 are preferred when the limit is reached, but memory operations may
1 still be scheduled.
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