gcc: Blackfin Options
1
1 3.18.6 Blackfin Options
1 -----------------------
1
1 '-mcpu=CPU[-SIREVISION]'
1 Specifies the name of the target Blackfin processor. Currently,
1 CPU can be one of 'bf512', 'bf514', 'bf516', 'bf518', 'bf522',
1 'bf523', 'bf524', 'bf525', 'bf526', 'bf527', 'bf531', 'bf532',
1 'bf533', 'bf534', 'bf536', 'bf537', 'bf538', 'bf539', 'bf542',
1 'bf544', 'bf547', 'bf548', 'bf549', 'bf542m', 'bf544m', 'bf547m',
1 'bf548m', 'bf549m', 'bf561', 'bf592'.
1
1 The optional SIREVISION specifies the silicon revision of the
1 target Blackfin processor. Any workarounds available for the
1 targeted silicon revision are enabled. If SIREVISION is 'none', no
1 workarounds are enabled. If SIREVISION is 'any', all workarounds
1 for the targeted processor are enabled. The '__SILICON_REVISION__'
1 macro is defined to two hexadecimal digits representing the major
1 and minor numbers in the silicon revision. If SIREVISION is
1 'none', the '__SILICON_REVISION__' is not defined. If SIREVISION
1 is 'any', the '__SILICON_REVISION__' is defined to be '0xffff'. If
1 this optional SIREVISION is not used, GCC assumes the latest known
1 silicon revision of the targeted Blackfin processor.
1
1 GCC defines a preprocessor macro for the specified CPU. For the
1 'bfin-elf' toolchain, this option causes the hardware BSP provided
1 by libgloss to be linked in if '-msim' is not given.
1
1 Without this option, 'bf532' is used as the processor by default.
1
1 Note that support for 'bf561' is incomplete. For 'bf561', only the
1 preprocessor macro is defined.
1
1 '-msim'
1 Specifies that the program will be run on the simulator. This
1 causes the simulator BSP provided by libgloss to be linked in.
1 This option has effect only for 'bfin-elf' toolchain. Certain
1 other options, such as '-mid-shared-library' and '-mfdpic', imply
1 '-msim'.
1
1 '-momit-leaf-frame-pointer'
1 Don't keep the frame pointer in a register for leaf functions.
1 This avoids the instructions to save, set up and restore frame
1 pointers and makes an extra register available in leaf functions.
1
1 '-mspecld-anomaly'
1 When enabled, the compiler ensures that the generated code does not
1 contain speculative loads after jump instructions. If this option
1 is used, '__WORKAROUND_SPECULATIVE_LOADS' is defined.
1
1 '-mno-specld-anomaly'
1 Don't generate extra code to prevent speculative loads from
1 occurring.
1
1 '-mcsync-anomaly'
1 When enabled, the compiler ensures that the generated code does not
1 contain CSYNC or SSYNC instructions too soon after conditional
1 branches. If this option is used, '__WORKAROUND_SPECULATIVE_SYNCS'
1 is defined.
1
1 '-mno-csync-anomaly'
1 Don't generate extra code to prevent CSYNC or SSYNC instructions
1 from occurring too soon after a conditional branch.
1
1 '-mlow-64k'
1 When enabled, the compiler is free to take advantage of the
1 knowledge that the entire program fits into the low 64k of memory.
1
1 '-mno-low-64k'
1 Assume that the program is arbitrarily large. This is the default.
1
1 '-mstack-check-l1'
1 Do stack checking using information placed into L1 scratchpad
1 memory by the uClinux kernel.
1
1 '-mid-shared-library'
1 Generate code that supports shared libraries via the library ID
1 method. This allows for execute in place and shared libraries in
1 an environment without virtual memory management. This option
1 implies '-fPIC'. With a 'bfin-elf' target, this option implies
1 '-msim'.
1
1 '-mno-id-shared-library'
1 Generate code that doesn't assume ID-based shared libraries are
1 being used. This is the default.
1
1 '-mleaf-id-shared-library'
1 Generate code that supports shared libraries via the library ID
1 method, but assumes that this library or executable won't link
1 against any other ID shared libraries. That allows the compiler to
1 use faster code for jumps and calls.
1
1 '-mno-leaf-id-shared-library'
1 Do not assume that the code being compiled won't link against any
1 ID shared libraries. Slower code is generated for jump and call
1 insns.
1
1 '-mshared-library-id=n'
1 Specifies the identification number of the ID-based shared library
1 being compiled. Specifying a value of 0 generates more compact
1 code; specifying other values forces the allocation of that number
1 to the current library but is no more space- or time-efficient than
1 omitting this option.
1
1 '-msep-data'
1 Generate code that allows the data segment to be located in a
1 different area of memory from the text segment. This allows for
1 execute in place in an environment without virtual memory
1 management by eliminating relocations against the text section.
1
1 '-mno-sep-data'
1 Generate code that assumes that the data segment follows the text
1 segment. This is the default.
1
1 '-mlong-calls'
1 '-mno-long-calls'
1 Tells the compiler to perform function calls by first loading the
1 address of the function into a register and then performing a
1 subroutine call on this register. This switch is needed if the
1 target function lies outside of the 24-bit addressing range of the
1 offset-based version of subroutine call instruction.
1
1 This feature is not enabled by default. Specifying
1 '-mno-long-calls' restores the default behavior. Note these
1 switches have no effect on how the compiler generates code to
1 handle function calls via function pointers.
1
1 '-mfast-fp'
1 Link with the fast floating-point library. This library relaxes
1 some of the IEEE floating-point standard's rules for checking
1 inputs against Not-a-Number (NAN), in the interest of performance.
1
1 '-minline-plt'
1 Enable inlining of PLT entries in function calls to functions that
1 are not known to bind locally. It has no effect without '-mfdpic'.
1
1 '-mmulticore'
1 Build a standalone application for multicore Blackfin processors.
1 This option causes proper start files and link scripts supporting
1 multicore to be used, and defines the macro '__BFIN_MULTICORE'. It
1 can only be used with '-mcpu=bf561[-SIREVISION]'.
1
1 This option can be used with '-mcorea' or '-mcoreb', which selects
1 the one-application-per-core programming model. Without '-mcorea'
1 or '-mcoreb', the single-application/dual-core programming model is
1 used. In this model, the main function of Core B should be named
1 as 'coreb_main'.
1
1 If this option is not used, the single-core application programming
1 model is used.
1
1 '-mcorea'
1 Build a standalone application for Core A of BF561 when using the
1 one-application-per-core programming model. Proper start files and
1 link scripts are used to support Core A, and the macro
1 '__BFIN_COREA' is defined. This option can only be used in
1 conjunction with '-mmulticore'.
1
1 '-mcoreb'
1 Build a standalone application for Core B of BF561 when using the
1 one-application-per-core programming model. Proper start files and
1 link scripts are used to support Core B, and the macro
1 '__BFIN_COREB' is defined. When this option is used, 'coreb_main'
1 should be used instead of 'main'. This option can only be used in
1 conjunction with '-mmulticore'.
1
1 '-msdram'
1 Build a standalone application for SDRAM. Proper start files and
1 link scripts are used to put the application into SDRAM, and the
1 macro '__BFIN_SDRAM' is defined. The loader should initialize
1 SDRAM before loading the application.
1
1 '-micplb'
1 Assume that ICPLBs are enabled at run time. This has an effect on
1 certain anomaly workarounds. For Linux targets, the default is to
1 assume ICPLBs are enabled; for standalone applications the default
1 is off.
1