as: Z8000 Opcodes
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1 9.57.4 Opcodes
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1 For detailed information on the Z8000 machine instruction set, see
1 'Z8000 Technical Manual'.
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1 The following table summarizes the opcodes and their arguments:
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1 rs 16 bit source register
1 rd 16 bit destination register
1 rbs 8 bit source register
1 rbd 8 bit destination register
1 rrs 32 bit source register
1 rrd 32 bit destination register
1 rqs 64 bit source register
1 rqd 64 bit destination register
1 addr 16/24 bit address
1 imm immediate data
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1 adc rd,rs clrb addr cpsir @rd,@rs,rr,cc
1 adcb rbd,rbs clrb addr(rd) cpsirb @rd,@rs,rr,cc
1 add rd,@rs clrb rbd dab rbd
1 add rd,addr com @rd dbjnz rbd,disp7
1 add rd,addr(rs) com addr dec @rd,imm4m1
1 add rd,imm16 com addr(rd) dec addr(rd),imm4m1
1 add rd,rs com rd dec addr,imm4m1
1 addb rbd,@rs comb @rd dec rd,imm4m1
1 addb rbd,addr comb addr decb @rd,imm4m1
1 addb rbd,addr(rs) comb addr(rd) decb addr(rd),imm4m1
1 addb rbd,imm8 comb rbd decb addr,imm4m1
1 addb rbd,rbs comflg flags decb rbd,imm4m1
1 addl rrd,@rs cp @rd,imm16 di i2
1 addl rrd,addr cp addr(rd),imm16 div rrd,@rs
1 addl rrd,addr(rs) cp addr,imm16 div rrd,addr
1 addl rrd,imm32 cp rd,@rs div rrd,addr(rs)
1 addl rrd,rrs cp rd,addr div rrd,imm16
1 and rd,@rs cp rd,addr(rs) div rrd,rs
1 and rd,addr cp rd,imm16 divl rqd,@rs
1 and rd,addr(rs) cp rd,rs divl rqd,addr
1 and rd,imm16 cpb @rd,imm8 divl rqd,addr(rs)
1 and rd,rs cpb addr(rd),imm8 divl rqd,imm32
1 andb rbd,@rs cpb addr,imm8 divl rqd,rrs
1 andb rbd,addr cpb rbd,@rs djnz rd,disp7
1 andb rbd,addr(rs) cpb rbd,addr ei i2
1 andb rbd,imm8 cpb rbd,addr(rs) ex rd,@rs
1 andb rbd,rbs cpb rbd,imm8 ex rd,addr
1 bit @rd,imm4 cpb rbd,rbs ex rd,addr(rs)
1 bit addr(rd),imm4 cpd rd,@rs,rr,cc ex rd,rs
1 bit addr,imm4 cpdb rbd,@rs,rr,cc exb rbd,@rs
1 bit rd,imm4 cpdr rd,@rs,rr,cc exb rbd,addr
1 bit rd,rs cpdrb rbd,@rs,rr,cc exb rbd,addr(rs)
1 bitb @rd,imm4 cpi rd,@rs,rr,cc exb rbd,rbs
1 bitb addr(rd),imm4 cpib rbd,@rs,rr,cc ext0e imm8
1 bitb addr,imm4 cpir rd,@rs,rr,cc ext0f imm8
1 bitb rbd,imm4 cpirb rbd,@rs,rr,cc ext8e imm8
1 bitb rbd,rs cpl rrd,@rs ext8f imm8
1 bpt cpl rrd,addr exts rrd
1 call @rd cpl rrd,addr(rs) extsb rd
1 call addr cpl rrd,imm32 extsl rqd
1 call addr(rd) cpl rrd,rrs halt
1 calr disp12 cpsd @rd,@rs,rr,cc in rd,@rs
1 clr @rd cpsdb @rd,@rs,rr,cc in rd,imm16
1 clr addr cpsdr @rd,@rs,rr,cc inb rbd,@rs
1 clr addr(rd) cpsdrb @rd,@rs,rr,cc inb rbd,imm16
1 clr rd cpsi @rd,@rs,rr,cc inc @rd,imm4m1
1 clrb @rd cpsib @rd,@rs,rr,cc inc addr(rd),imm4m1
1 inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs)
1 inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16
1 incb @rd,imm4m1 ldb rd(rx),rbs mult rrd,rs
1 incb addr(rd),imm4m1 ldctl ctrl,rs multl rqd,@rs
1 incb addr,imm4m1 ldctl rd,ctrl multl rqd,addr
1 incb rbd,imm4m1 ldd @rs,@rd,rr multl rqd,addr(rs)
1 ind @rd,@rs,ra lddb @rs,@rd,rr multl rqd,imm32
1 indb @rd,@rs,rba lddr @rs,@rd,rr multl rqd,rrs
1 inib @rd,@rs,ra lddrb @rs,@rd,rr neg @rd
1 inibr @rd,@rs,ra ldi @rd,@rs,rr neg addr
1 iret ldib @rd,@rs,rr neg addr(rd)
1 jp cc,@rd ldir @rd,@rs,rr neg rd
1 jp cc,addr ldirb @rd,@rs,rr negb @rd
1 jp cc,addr(rd) ldk rd,imm4 negb addr
1 jr cc,disp8 ldl @rd,rrs negb addr(rd)
1 ld @rd,imm16 ldl addr(rd),rrs negb rbd
1 ld @rd,rs ldl addr,rrs nop
1 ld addr(rd),imm16 ldl rd(imm16),rrs or rd,@rs
1 ld addr(rd),rs ldl rd(rx),rrs or rd,addr
1 ld addr,imm16 ldl rrd,@rs or rd,addr(rs)
1 ld addr,rs ldl rrd,addr or rd,imm16
1 ld rd(imm16),rs ldl rrd,addr(rs) or rd,rs
1 ld rd(rx),rs ldl rrd,imm32 orb rbd,@rs
1 ld rd,@rs ldl rrd,rrs orb rbd,addr
1 ld rd,addr ldl rrd,rs(imm16) orb rbd,addr(rs)
1 ld rd,addr(rs) ldl rrd,rs(rx) orb rbd,imm8
1 ld rd,imm16 ldm @rd,rs,n orb rbd,rbs
1 ld rd,rs ldm addr(rd),rs,n out @rd,rs
1 ld rd,rs(imm16) ldm addr,rs,n out imm16,rs
1 ld rd,rs(rx) ldm rd,@rs,n outb @rd,rbs
1 lda rd,addr ldm rd,addr(rs),n outb imm16,rbs
1 lda rd,addr(rs) ldm rd,addr,n outd @rd,@rs,ra
1 lda rd,rs(imm16) ldps @rs outdb @rd,@rs,rba
1 lda rd,rs(rx) ldps addr outib @rd,@rs,ra
1 ldar rd,disp16 ldps addr(rs) outibr @rd,@rs,ra
1 ldb @rd,imm8 ldr disp16,rs pop @rd,@rs
1 ldb @rd,rbs ldr rd,disp16 pop addr(rd),@rs
1 ldb addr(rd),imm8 ldrb disp16,rbs pop addr,@rs
1 ldb addr(rd),rbs ldrb rbd,disp16 pop rd,@rs
1 ldb addr,imm8 ldrl disp16,rrs popl @rd,@rs
1 ldb addr,rbs ldrl rrd,disp16 popl addr(rd),@rs
1 ldb rbd,@rs mbit popl addr,@rs
1 ldb rbd,addr mreq rd popl rrd,@rs
1 ldb rbd,addr(rs) mres push @rd,@rs
1 ldb rbd,imm8 mset push @rd,addr
1 ldb rbd,rbs mult rrd,@rs push @rd,addr(rs)
1 ldb rbd,rs(imm16) mult rrd,addr push @rd,imm16
1 push @rd,rs set addr,imm4 subl rrd,imm32
1 pushl @rd,@rs set rd,imm4 subl rrd,rrs
1 pushl @rd,addr set rd,rs tcc cc,rd
1 pushl @rd,addr(rs) setb @rd,imm4 tccb cc,rbd
1 pushl @rd,rrs setb addr(rd),imm4 test @rd
1 res @rd,imm4 setb addr,imm4 test addr
1 res addr(rd),imm4 setb rbd,imm4 test addr(rd)
1 res addr,imm4 setb rbd,rs test rd
1 res rd,imm4 setflg imm4 testb @rd
1 res rd,rs sinb rbd,imm16 testb addr
1 resb @rd,imm4 sinb rd,imm16 testb addr(rd)
1 resb addr(rd),imm4 sind @rd,@rs,ra testb rbd
1 resb addr,imm4 sindb @rd,@rs,rba testl @rd
1 resb rbd,imm4 sinib @rd,@rs,ra testl addr
1 resb rbd,rs sinibr @rd,@rs,ra testl addr(rd)
1 resflg imm4 sla rd,imm8 testl rrd
1 ret cc slab rbd,imm8 trdb @rd,@rs,rba
1 rl rd,imm1or2 slal rrd,imm8 trdrb @rd,@rs,rba
1 rlb rbd,imm1or2 sll rd,imm8 trib @rd,@rs,rbr
1 rlc rd,imm1or2 sllb rbd,imm8 trirb @rd,@rs,rbr
1 rlcb rbd,imm1or2 slll rrd,imm8 trtdrb @ra,@rb,rbr
1 rldb rbb,rba sout imm16,rs trtib @ra,@rb,rr
1 rr rd,imm1or2 soutb imm16,rbs trtirb @ra,@rb,rbr
1 rrb rbd,imm1or2 soutd @rd,@rs,ra trtrb @ra,@rb,rbr
1 rrc rd,imm1or2 soutdb @rd,@rs,rba tset @rd
1 rrcb rbd,imm1or2 soutib @rd,@rs,ra tset addr
1 rrdb rbb,rba soutibr @rd,@rs,ra tset addr(rd)
1 rsvd36 sra rd,imm8 tset rd
1 rsvd38 srab rbd,imm8 tsetb @rd
1 rsvd78 sral rrd,imm8 tsetb addr
1 rsvd7e srl rd,imm8 tsetb addr(rd)
1 rsvd9d srlb rbd,imm8 tsetb rbd
1 rsvd9f srll rrd,imm8 xor rd,@rs
1 rsvdb9 sub rd,@rs xor rd,addr
1 rsvdbf sub rd,addr xor rd,addr(rs)
1 sbc rd,rs sub rd,addr(rs) xor rd,imm16
1 sbcb rbd,rbs sub rd,imm16 xor rd,rs
1 sc imm8 sub rd,rs xorb rbd,@rs
1 sda rd,rs subb rbd,@rs xorb rbd,addr
1 sdab rbd,rs subb rbd,addr xorb rbd,addr(rs)
1 sdal rrd,rs subb rbd,addr(rs) xorb rbd,imm8
1 sdl rd,rs subb rbd,imm8 xorb rbd,rbs
1 sdlb rbd,rs subb rbd,rbs xorb rbd,rbs
1 sdll rrd,rs subl rrd,@rs
1 set @rd,imm4 subl rrd,addr
1 set addr(rd),imm4 subl rrd,addr(rs)
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