as: Xtensa Immediate Relaxation

1 
1 9.55.4.4 Other Immediate Field Relaxation
1 .........................................
1 
1 The assembler normally performs the following other relaxations.  They
DONTPRINTYET 11 can be disabled by using underscore prefixes (⇒Opcode Names Xtensa
 Opcodes.), the '--no-transform' command-line option (*noteCommand Line
DONTPRINTYET 1DONTPRINTYET 11 can be disabled by using underscore prefixes (⇒Opcode Names Xtensa
 Opcodes.), the '--no-transform' command-line option (⇒Command Line

 Options Xtensa Options.), or the 'no-transform' directive (*note1DONTPRINTYET 1DONTPRINTYET 11 can be disabled by using underscore prefixes (⇒Opcode Names Xtensa
 Opcodes.), the '--no-transform' command-line option (⇒Command Line

 Options Xtensa Options.), or the 'no-transform' directive (⇒
 transform Transform Directive.).
1 
1    The 'MOVI' machine instruction can only materialize values in the
1 range from -2048 to 2047.  Values outside this range are best
1 materialized with 'L32R' instructions.  Thus:
1 
1          movi a0, 100000
1 
1    is assembled into the following machine code:
1 
1          .literal .L1, 100000
1          l32r a0, .L1
1 
1    The 'L8UI' machine instruction can only be used with immediate
1 offsets in the range from 0 to 255.  The 'L16SI' and 'L16UI' machine
1 instructions can only be used with offsets from 0 to 510.  The 'L32I'
1 machine instruction can only be used with offsets from 0 to 1020.  A
1 load offset outside these ranges can be materialized with an 'L32R'
1 instruction if the destination register of the load is different than
1 the source address register.  For example:
1 
1          l32i a1, a0, 2040
1 
1    is translated to:
1 
1          .literal .L1, 2040
1          l32r a1, .L1
1          add a1, a0, a1
1          l32i a1, a1, 0
1 
1 If the load destination and source address register are the same, an
1 out-of-range offset causes an error.
1 
1    The Xtensa 'ADDI' instruction only allows immediate operands in the
1 range from -128 to 127.  There are a number of alternate instruction
1 sequences for the 'ADDI' operation.  First, if the immediate is 0, the
1 'ADDI' will be turned into a 'MOV.N' instruction (or the equivalent 'OR'
1 instruction if the code density option is not available).  If the 'ADDI'
1 immediate is outside of the range -128 to 127, but inside the range
1 -32896 to 32639, an 'ADDMI' instruction or 'ADDMI'/'ADDI' sequence will
1 be used.  Finally, if the immediate is outside of this range and a free
1 register is available, an 'L32R'/'ADD' sequence will be used with a
1 literal allocated from the literal pool.
1 
1    For example:
1 
1          addi    a5, a6, 0
1          addi    a5, a6, 512
1          addi    a5, a6, 513
1          addi    a5, a6, 50000
1 
1    is assembled into the following:
1 
1          .literal .L1, 50000
1          mov.n   a5, a6
1          addmi   a5, a6, 0x200
1          addmi   a5, a6, 0x200
1          addi    a5, a5, 1
1          l32r    a5, .L1
1          add     a5, a6, a5
1