as: M32R-Opts
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1 9.22.1 M32R Options
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1 The Renesas M32R version of 'as' has a few machine dependent options:
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1 '-m32rx'
1 'as' can assemble code for several different members of the Renesas
1 M32R family. Normally the default is to assemble code for the M32R
1 microprocessor. This option may be used to change the default to
1 the M32RX microprocessor, which adds some more instructions to the
1 basic M32R instruction set, and some additional parameters to some
1 of the original instructions.
1
1 '-m32r2'
1 This option changes the target processor to the M32R2
1 microprocessor.
1
1 '-m32r'
1 This option can be used to restore the assembler's default
1 behaviour of assembling for the M32R microprocessor. This can be
1 useful if the default has been changed by a previous command line
1 option.
1
1 '-little'
1 This option tells the assembler to produce little-endian code and
1 data. The default is dependent upon how the toolchain was
1 configured.
1
1 '-EL'
1 This is a synonym for _-little_.
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1 '-big'
1 This option tells the assembler to produce big-endian code and
1 data.
1
1 '-EB'
1 This is a synonym for _-big_.
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1 '-KPIC'
1 This option specifies that the output of the assembler should be
1 marked as position-independent code (PIC).
1
1 '-parallel'
1 This option tells the assembler to attempts to combine two
1 sequential instructions into a single, parallel instruction, where
1 it is legal to do so.
1
1 '-no-parallel'
1 This option disables a previously enabled _-parallel_ option.
1
1 '-no-bitinst'
1 This option disables the support for the extended bit-field
1 instructions provided by the M32R2. If this support needs to be
1 re-enabled the _-bitinst_ switch can be used to restore it.
1
1 '-O'
1 This option tells the assembler to attempt to optimize the
1 instructions that it produces. This includes filling delay slots
1 and converting sequential instructions into parallel ones. This
1 option implies _-parallel_.
1
1 '-warn-explicit-parallel-conflicts'
1 Instructs 'as' to produce warning messages when questionable
1 parallel instructions are encountered. This option is enabled by
1 default, but 'gcc' disables it when it invokes 'as' directly.
1 Questionable instructions are those whose behaviour would be
1 different if they were executed sequentially. For example the code
1 fragment 'mv r1, r2 || mv r3, r1' produces a different result from
1 'mv r1, r2 \n mv r3, r1' since the former moves r1 into r3 and then
1 r2 into r1, whereas the later moves r2 into r1 and r3.
1
1 '-Wp'
1 This is a shorter synonym for the
1 _-warn-explicit-parallel-conflicts_ option.
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1 '-no-warn-explicit-parallel-conflicts'
1 Instructs 'as' not to produce warning messages when questionable
1 parallel instructions are encountered.
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1 '-Wnp'
1 This is a shorter synonym for the
1 _-no-warn-explicit-parallel-conflicts_ option.
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1 '-ignore-parallel-conflicts'
1 This option tells the assembler's to stop checking parallel
1 instructions for constraint violations. This ability is provided
1 for hardware vendors testing chip designs and should not be used
1 under normal circumstances.
1
1 '-no-ignore-parallel-conflicts'
1 This option restores the assembler's default behaviour of checking
1 parallel instructions to detect constraint violations.
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1 '-Ip'
1 This is a shorter synonym for the _-ignore-parallel-conflicts_
1 option.
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1 '-nIp'
1 This is a shorter synonym for the _-no-ignore-parallel-conflicts_
1 option.
1
1 '-warn-unmatched-high'
1 This option tells the assembler to produce a warning message if a
1 '.high' pseudo op is encountered without a matching '.low' pseudo
1 op. The presence of such an unmatched pseudo op usually indicates
1 a programming error.
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1 '-no-warn-unmatched-high'
1 Disables a previously enabled _-warn-unmatched-high_ option.
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1 '-Wuh'
1 This is a shorter synonym for the _-warn-unmatched-high_ option.
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1 '-Wnuh'
1 This is a shorter synonym for the _-no-warn-unmatched-high_ option.
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