as: AVR Pseudo Instructions

1 
1 9.5.4 Pseudo Instructions
1 -------------------------
1 
1 The only available pseudo-instruction '__gcc_isr' can be activated by
1 option '-mgcc-isr'.
1 
1 '__gcc_isr 1'
1      Emit code chunk to be used in avr-gcc ISR prologue.  It will expand
1      to at most six 1-word instructions, all optional: push of
1      'tmp_reg', push of 'SREG', push and clear of 'zero_reg', push of
1      REG.
1 
1 '__gcc_isr 2'
1      Emit code chunk to be used in an avr-gcc ISR epilogue.  It will
1      expand to at most five 1-word instructions, all optional: pop of
1      REG, pop of 'zero_reg', pop of 'SREG', pop of 'tmp_reg'.
1 
1 '__gcc_isr 0, REG'
1      Finish avr-gcc ISR function.  Scan code since the last prologue for
1      usage of: 'SREG', 'tmp_reg', 'zero_reg'.  Prologue chunk and
1      epilogue chunks will be replaced by appropriate code to save /
1      restore 'SREG', 'tmp_reg', 'zero_reg' and REG.
1 
1    Example input:
1 
1      __vector1:
1          __gcc_isr 1
1          lds r24, var
1          inc r24
1          sts var, r24
1          __gcc_isr 2
1          reti
1          __gcc_isr 0, r24
1 
1    Example output:
1 
1      00000000 <__vector1>:
1         0:   8f 93           push    r24
1         2:   8f b7           in      r24, 0x3f
1         4:   8f 93           push    r24
1         6:   80 91 60 00     lds     r24, 0x0060     ; 0x800060 <var>
1         a:   83 95           inc     r24
1         c:   80 93 60 00     sts     0x0060, r24     ; 0x800060 <var>
1        10:   8f 91           pop     r24
1        12:   8f bf           out     0x3f, r24
1        14:   8f 91           pop     r24
1        16:   18 95           reti
1