as: ARM-Relocations

1 
1 9.4.2.4 ARM relocation generation
1 .................................
1 
1 Specific data relocations can be generated by putting the relocation
1 name in parentheses after the symbol name.  For example:
1 
1              .word foo(TARGET1)
1 
1    This will generate an 'R_ARM_TARGET1' relocation against the symbol
1 FOO.  The following relocations are supported: 'GOT', 'GOTOFF',
1 'TARGET1', 'TARGET2', 'SBREL', 'TLSGD', 'TLSLDM', 'TLSLDO', 'TLSDESC',
1 'TLSCALL', 'GOTTPOFF', 'GOT_PREL' and 'TPOFF'.
1 
1    For compatibility with older toolchains the assembler also accepts
1 '(PLT)' after branch targets.  On legacy targets this will generate the
1 deprecated 'R_ARM_PLT32' relocation.  On EABI targets it will encode
1 either the 'R_ARM_CALL' or 'R_ARM_JUMP24' relocation, as appropriate.
1 
1    Relocations for 'MOVW' and 'MOVT' instructions can be generated by
1 prefixing the value with '#:lower16:' and '#:upper16' respectively.  For
1 example to load the 32-bit address of foo into r0:
1 
1              MOVW r0, #:lower16:foo
1              MOVT r0, #:upper16:foo
1 
1    Relocations 'R_ARM_THM_ALU_ABS_G0_NC', 'R_ARM_THM_ALU_ABS_G1_NC',
1 'R_ARM_THM_ALU_ABS_G2_NC' and 'R_ARM_THM_ALU_ABS_G3_NC' can be generated
1 by prefixing the value with '#:lower0_7:#', '#:lower8_15:#',
1 '#:upper0_7:#' and '#:upper8_15:#' respectively.  For example to load
1 the 32-bit address of foo into r0:
1 
1              MOVS r0, #:upper8_15:#foo
1              LSLS r0, r0, #8
1              ADDS r0, #:upper0_7:#foo
1              LSLS r0, r0, #8
1              ADDS r0, #:lower8_15:#foo
1              LSLS r0, r0, #8
1              ADDS r0, #:lower0_7:#foo
1