as: ARC-Regs

1 
1 9.3.2.2 Register Names
1 ......................
1 
1 The ARC assembler uses the following register names for its core
1 registers:
1 
1 'r0-r31'
1      The core general registers.  Registers 'r26' through 'r31' have
1      special functions, and are usually referred to by those synonyms.
1 
1 'gp'
1      The global pointer and a synonym for 'r26'.
1 
1 'fp'
1      The frame pointer and a synonym for 'r27'.
1 
1 'sp'
1      The stack pointer and a synonym for 'r28'.
1 
1 'ilink1'
1      For ARC 600 and ARC 700, the level 1 interrupt link register and a
1      synonym for 'r29'.  Not supported for ARCv2.
1 
1 'ilink'
1      For ARCv2, the interrupt link register and a synonym for 'r29'.
1      Not supported for ARC 600 and ARC 700.
1 
1 'ilink2'
1      For ARC 600 and ARC 700, the level 2 interrupt link register and a
1      synonym for 'r30'.  Not supported for ARC v2.
1 
1 'blink'
1      The link register and a synonym for 'r31'.
1 
1 'r32-r59'
1      The extension core registers.
1 
1 'lp_count'
1      The loop count register.
1 
1 'pcl'
1      The word aligned program counter.
1 
1    In addition the ARC processor has a large number of _auxiliary
1 registers_.  The precise set depends on the extensions being supported,
1 but the following baseline set are always defined:
1 
1 'identity'
1      Processor Identification register.  Auxiliary register address 0x4.
1 
1 'pc'
1      Program Counter.  Auxiliary register address 0x6.
1 
1 'status32'
1      Status register.  Auxiliary register address 0x0a.
1 
1 'bta'
1      Branch Target Address.  Auxiliary register address 0x412.
1 
1 'ecr'
1      Exception Cause Register.  Auxiliary register address 0x403.
1 
1 'int_vector_base'
1      Interrupt Vector Base address.  Auxiliary register address 0x25.
1 
1 'status32_p0'
1      Stored STATUS32 register on entry to level P0 interrupts.
1      Auxiliary register address 0xb.
1 
1 'aux_user_sp'
1      Saved User Stack Pointer.  Auxiliary register address 0xd.
1 
1 'eret'
1      Exception Return Address.  Auxiliary register address 0x400.
1 
1 'erbta'
1      BTA saved on exception entry.  Auxiliary register address 0x401.
1 
1 'erstatus'
1      STATUS32 saved on exception.  Auxiliary register address 0x402.
1 
1 'bcr_ver'
1      Build Configuration Registers Version.  Auxiliary register address
1      0x60.
1 
1 'bta_link_build'
1      Build configuration for: BTA Registers.  Auxiliary register address
1      0x63.
1 
1 'vecbase_ac_build'
1      Build configuration for: Interrupts.  Auxiliary register address
1      0x68.
1 
1 'rf_build'
1      Build configuration for: Core Registers.  Auxiliary register
1      address 0x6e.
1 
1 'dccm_build'
1      DCCM RAM Configuration Register.  Auxiliary register address 0xc1.
1 
1    Additional auxiliary register names are defined according to the
1 processor architecture version and extensions selected by the options.
1